TPS51116MPWPREP datasheet(6/38 Pages) TI1

Part #	TPS51116MPWPREP

Description	COMPLETE DDR, DDR2, DDR3, AND LPDDR3 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 1-A LDO, BUFFERED REFERENCE

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Manufacturer	TI1 [Texas Instruments]

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TPS51116-EP

SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012

www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

TJ = −55°C to 125°C, TJ = TA, VV5IN = 5 V, VLDOIN is connected to VDDQ output (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

INTERNAL BST DIODE

VFBST

Forward voltage

VV5IN-VBST , IF = 10 mA

0.58

0.8

1.1

V

IVBSTLK

VBST leakage current

VVBST = 34 V, VLL = 28 V, VVDDQ = 2.6 V

0.1

1.11

μA

PROTECTIONS

VPGND-CS , PGOOD = HI, VCS < 0.5 V

47

60

70

VOCL

Current limit threshold

mV

VPGND-CS , PGOOD = LO, VCS < 0.5 V

18

30

40

VCS > 4.5 V, PGOOD = HI

4

10

20

ITRIP

Current sense sink current

μA

VCS > 4.5 V, PGOOD = LO

2

5

10

TRIP current temperature

RDS(on) sense scheme, On the basis

TCITRIP

4500

ppm/°C

coefficient

of TA = 25°C

(1)

Overcurrent protection

(VV5IN-CS - VPGND-LL), VV5IN-CS = 60 mV,

VOCL(off)

-7

0

7

COMP offset

VCS > 4.5 V

mV

Current limit threshold setting

VR(trip)

VV5IN-CS

30

150

range

POWERGOOD COMPARATOR

PG in from lower

92%

95%

98%

VTVDDQPG

VDDQ powergood threshold

PG in from higher

102%

105%

108%

PG hysteresis

5%

IPG(max)

PGOOD sink current

VVTT = 0 V, VPGOOD = 0.5 V

2.3

7.5

mA

tPG(del)

PGOOD delay time

Delay for PG in

78

130

205

μs

UNDERVOLTAGE LOCKOUT AND LOGIC THRESHOLD

Wake up

3.6

4

4.4

V5IN UVLO threshold

VUVV5IN

voltage

Hysteresis

0.19

0.3

0.41

No discharge

4.7

VTHMODE

MODE threshold

Non-tracking discharge

0.08

2.5 V output

0.075

0.150

0.255

V

VTHVDDQSET

VDDQSET threshold voltage

1.8 V output

3.45

4

4.55

VIH

High-level input voltage

S3, S5

2.2

VIL

Low-level input voltage

S3, S5

0.3

VIHYST

Hysteresis voltage

S3, S5

0.2

VINLEAK

Logic input leakage current

S3, S5, MODE

-1

1

μA

VINVDDQSET

Input leakage/ bias current

VDDQSET

-1

1

UNDERVOLTAGE AND OVERVOLTAGE PROTECTION

OVP detect

109%

115%

121%

VDDQ OVP trip threshold

VOVP

voltage

Hysteresis

5%

VDDQ OVP propagation

tOVPDEL

1.5

μs

delay

UVP detect

70%

VUVP

Output UVP trip threshold

Hysteresis

10%

Output UVP propagation

tUVPDEL

32

delay

cycle

tUVPEN

Output UVP enable delay

1007

THERMAL SHUTDOWN

Shutdown temperature

160

TSDN

Thermal SDN threshold (1)

°C

Hysteresis

10

(1)

Specified by design. Not production tested.

6

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