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TPS5110 Datasheet(PDF) 8 Page - Texas Instruments |
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TPS5110 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 43 page  TPS5110 SLVS025B − APRIL 2002 − REVISED JULY 2004 8 www.ti.com DETAILED DESCRIPTION PWM operation The SBRC block has a high-speed error amplifier to regulate the output voltage of the synchronous buck converter. The output voltage of the SBRC is fed back to the inverting input (INV) of the error amplifier. The noninverting input is internally connected to a 0.85 V precise band gap reference circuit. The unity-gain bandwidth of the amplifier is 2.5 MHz. This decreases the amplifier delay during fast-load transients and contributes to a fast response. Loop gain and phase compensation is programmable by an external C, R network between the FB and INV pins. The output signal of the error amplifier is compared with a triangular wave to achieve the PWM control signal. The oscillation frequency of this triangular wave sets the switching frequency of the SBRC and is determined by the capacitor connected between the CT and GND pins. The PWM mode is used for the entire load range if the PWM_SEL pin is set LOW, or used in high-output current condition if auto PWM/SKIP mode is selected by setting the same pin to HIGH. SKIP mode operation The PWM_SEL pin selects either the auto PWM/SKIP mode or fixed PWM mode. If this pin is lower than 0.3 V, the SBRC operates in the fixed PWM mode. If 2.5 V (min.) or higher is applied, it operates in auto PWM/SKIP mode. In the auto PWM/SKIP mode, the operation changes from constant frequency PWM mode to an energy-saving SKIP mode automatically in accordance with load conditions. Using a MOSFET with ultra-low RDS(on) if the auto SKIP function is implemented is not recommended. The SBRC block has a hysteretic comparator to regulate the output voltage of the synchronous buck converter during SKIP mode. The delay from the comparator input to the driver output is typically 1.2 µs. In the SKIP mode, the frequency varies with load current and input voltage. high-side driver The high-side driver is designed to drive high current and low RDS(on) N-channel MOSFET(s). The current rating of the driver is 1.2 A at source and sink. When configured as a floating driver a 5-V bias voltage is delivered from external REG5V_IN supply. The instantaneous-drive current is supplied by the flying capacitor between the LH and LL pins since a 5-V power supply does not usually have low impedance. It is recommended to add a 5- Ω to 10- Ω resistor between the gate of the high-side MOSFET(s) and the OUT_u pin to suppress noise. The maximum voltage that can be applied between the LH and OUTGND pins is 33 V. When selecting the high-current rating MOSFET(s), it is important to pay attention to both gate-drive power dissipation and the rise/fall time against the dead-time between high-side and low-side drivers. The gate-drive power is dissipated from the controller device and it is proportional to the gate charge at Vgs = 5 V, PWM switching frequency and the numbers of all MOSFETs used for low-side and high-side switches. This gate drive loss should not exceed the maximum power dissipation of the device. low-side driver The low-side driver is designed to drive high-current and low RDS(on) N-channel MOSFET(s). The maximum drive voltage is 5 V from REG5V_IN pin. The current rating of the driver is typically 1.5 A at source and sink. Gate resistance is not necessary for the low-side MOSFET for switching noise suppression since it turns on after the parallel diode is turned on (ZVS). It needs the same dissipation consideration when using high-current rating MOSFET(s). Another issue that needs precaution is the gate threshold voltage. Even though the OUT_d pin is shorted to the OUTGND pin with low resistance when the low-side MOSFET(s) is OFF, high dv/dt at the LL pin during turnon of the high side arm generates voltage peak at the OUT_d pin through the drain to gate capacitance, Cdg, of the low-side MOSFET(s). To prevent a short period shoot-through during this switching event, the application designer should select MOSFET(s) with adequate threshold voltage. |
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