5

13

12

16

15

1

2

3

ILIM/

SYNC

VDD

OSNS

COMP

HDRV

BOOT2

PVDD

LDRV

VDD 2.25 V − 5.5 V

4

FB

11

BOOT1

TPS40021

6

SS/SD

7

RT

VOUT

14

SW

PGND

10

PWRGD

9

VDD

VOUT

SGND

TPS40021-EP

SLUSB58 – SEPTEMBER 2012

www.ti.com

The output voltage transient comparators provide a quick response , first strike, approach to output voltage

transients. The output voltage is sensed through a resistor divider at the OSNS pin. If an overvoltage condition is

detected the HDRV gate drive is shut-off and the LDRV gate drive is turned on until the output is returned to

regulation. Similarly, if an output undervoltage condition is sensed the HDRV gate drive goes to 95% duty cycle

to pump the output back up quickly. In either case, the PowerGood open drain output pulls low to indicate an

output voltage out of regulation condition. The PowerGood output can be daisy-chained to the SS/SD pin or

enable pin of other controllers or converters for output voltage sequencing. The transient comparators can be

disabled by simply tying the OSNS pin to VDD.

The TPS40021 can be externally synchronized through the ILIM/SYNC pin up to 1.5× the free-running frequency.

This allows multiple contollers to be synchronized to eliminate EMI concerns due to input beat frequencies

between controllers.

2

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