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TPS25740ARGER Datasheet(PDF) 5 Page - Texas Instruments |
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TPS25740ARGER Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 64 page  5 TPS25740, TPS25740A www.ti.com SLVSDG8A – APRIL 2016 – REVISED MAY 2016 Product Folder Links: TPS25740 TPS25740A Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Do not apply voltage to these pins. (3) Voltage allowed to rise above Absolute Maximum provided current is limited. 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Pin Voltage (sustained) VDD , EN12V, EN9V, CTL1, CTL2, UFP, PCTRL, CC1, CC2 –0.3 6 V VTX(2) –0.3 2.1 V VAUX(2) –0.3 4.5 V GD (3) –0.3 7 V HIPWR, PSEL, DVDD (2) –0.3 2.1 V GDNG(2) –0.5 40 V VBUS,VPWR, ISNS, DSCG, GDNS –0.5 30 V Pin Voltage (transient for 1ms) VBUS,VPWR, ISNS, DSCG, GDNS –1.5 30 V Pin-to-pin voltage V(GDNG) – V(GDNS) –0.3 20 V AGND to GND –0.3 0.3 V ISNS to VBUS –0.3 0.3 V Sinking current (average) CTL1, CTL2, UFP 8 mA GD 100 µA DSCG 10 mA Sinking current (transient, 50 ms pulse 0.25% duty cycle) DSCG 375 mA Current sourcing VTX Internally limited mA CC1, CC2 Internally limited mA VAUX 0 25 µA Operating junction temperature range, TJ –40 125 °C Storage temperature, Tstg –65 150 °C (1) This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. (2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. (4) These results were passing limits that were obtained on an application-level test board. Individual results may vary based on implementation. Surges per IEC61000-4-2, 1999 applied between CC1/CC2 and ground of TPS25740EVM-741 and TPS25740AEVM- 741 7.2 ESD Ratings (1) VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(2) ±2500 V Charged-device model (CDM), per JEDEC specification JESD22- C101(3) ±1000 IEC (4) 61000-4-2 contact discharge, CC1, CC2 ±8000 IEC (4) 61000-4-2 air-gap discharge, CC1, CC2 ±15000 |
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