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A4939 Datasheet(PDF) 11 Page - Allegro MicroSystems |
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A4939 Datasheet(HTML) 11 Page - Allegro MicroSystems |
11 / 20 page Automotive Three Phase MOSFET Driver A4939 11 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com age for high-side N-channel power MOSFET turn-on. At system start-up it is necessary to turn on each low-side drive (GLx) prior to attempting to turn on the complementary high-side (GHx), in order to charge the bootstrap capacitors. Low-side Gate Drive (GLA, GLB, GLC) The low-side, gate-drive outputs on GLA, GLB, and GLC are referenced to the LSS terminal. These outputs are designed to drive external N-channel power MOSFETs. An external resistor between the GLx gate drive output and the MOSFET gate ter- minal (mounted as close to the latter as possible) may be used to control the slew rate at the gate, thereby providing some control of the di/dt and dv/dt at the Sx terminals. Setting GLx high turns- on the upper half of the driver, sourcing current to the gate of the low-side MOSFET in the external motor-driving bridge, turning it on. Setting GLx low turns-on the lower half of the driver, sink- ing current from the external MOSFET gate circuit to the to the LSS terminal, turning it off. Drain Source Voltage Monitor The VDS fault threshold is set by applying a control voltage on the VDSTH pin, as detailed in figure 2. If a voltage between 0.2 and 2.0 V is applied, the threshold follows this level, subject to the Short to Ground Threshold (VSTGO) and Short to Battery Threshold (VSTBO) offsets detailed in the Electrical Characteris- tics table. If a voltage between 2.0 and 2.3 V is applied, the threshold approximates the applied level, but accuracy is not specified. If the VDSTH pin is driven below the VDS Disable Voltage (VDSD), 0.1 V (such as when shorted to ground), VDS fault reporting is disabled. If the VDSTH pin is taken above 2.7 V (such as when pulled up to the system logic supply voltage) the threshold is set to the VDS Threshold Internal voltage (VDSTH), detailed in the Electri- cal Characteristics table (typically 1.2 V). The VDSTH pin presents a high impedance at all voltages across its permissible input range (per the VDS Threshold Input Leak- age limits, VDSTHL, detailed in the Electrical Characteristics table) allowing a wide range of programming circuits to be used including simple resistive dividers. The VDSTH input has an internal passive first-order filter with a 1 VDSTH pin typically tied to system logic supply voltage (for example, V3 or V5) 2 Behaviour indeterminate due to threshold detection uncertainty 3 Threshold range confirmed by design 0 V 2.0 V 0.2 V External (Threshold set to voltage applied on VDSTH pin with accuracy specified in Electrical Characteristics table) 0.1 V 2.3 V 2.7 V 5.5 V Disabled External (Threshold set to voltage approximately equal to that applied on VDSTH pin. Accuracy not specified.) Indeterminate2, 3 Indeterminate2 Internal1 (Threshold set to internal value, VDSTHI, with accuracy specified in Electrical Characteristics table) VDSD VDSTH (min) VDSTH (max) Figure 2: VDSTH Pin Voltage versus VDS Monitor Function |
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