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TPS2343 Datasheet(PDF) 11 Page - Texas Instruments |
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TPS2343 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 40 page  TPS2343 SLUS644B − FEBRUARY 2005 − MAY 2005 11 www.ti.com TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NUMBER NAME I/O DESCRIPTION 19 P12VOB O This output delivers 12-V power to slot B when enabled and is pulled to PWRGND by an internal FET when PWRRNB is false or FAULTB is true. 20 M12VINB I Connect this power input to −12-V power to drive slot B. This input must be connected to M12VINA. Connect a 0.1- µF capacitor from this pin to PWRGND. 21 M12VOB O This output delivers −12-V power to slot B when enabled and is pulled to PWRGND by an internal FET when PWRRNB is false or FAULTB is true. Turn-on of −12-V power tracks turn-on of 12-V power and is controlled by the capacitor on P12VGB. 22 MISET I/O This pin programs current limit for 12-V, 5-V, 3.3-V, and −12-V main supplies. MISET does not con- trol 3.3VAUX or VIO current limit. The recommended resistor from MISET to ANAGND is 6.04 kΩ ±1%. Increasing the value of this resistor raises the current-limit thresholds for the supplies listed above proportionately. MISET resistor is 12 k Ω maximum. 23 ANAGND1 GND Ground for low-level signals including the current sense circuits and the voltage reference. 24 PCIXCAP1B O This pin indicates bit 1 of the PCIXCAPB state. 25 DIGGND2 GND This pin is the ground return for the digital circuits in the TPS2343. 26 PCIXCAP2B O This pin indicates bit 2 of the PCIXCAPB state. 27 FAULTB O This is an open-drain output that is low if there is a fault on the main power to slot B. This pin has an internal 100-k Ω pull-up resistor to DIGVCC. 28 AUXFLTB O This open-drain output is low if there is a fault on VAUX power to slot B. This pin has an internal 100-k Ω pull-up resistor to DIGVCC and hysteresis. 29 OUTUVB O This open-drain output is low if slot B outputs are below normal operating range. This pin has an internal 100-k Ω pull-up resistor to DIGVCC. 30 PCIXCAP3B O This pin indicates bit 3 of the PCIXCAPB state. 31 PCIXCAPB I This pin is the input to a 5-level A/D converter that determines the speed and mode of the inserted B slot card based on the impedance from this pin to ANAGND. The operation of this pin meets the specifications of the PCI−X Local Bus Specification, revision 2.0. 32 PWROFFB O This output is low when all of the slot B power outputs are discharged. 33 PWRENB I This pin enables main power for slot B when high. This pin has an internal 100-k Ω pull-up resistor to DIGVCC and hysteresis. When low, FAULTB is clearded and OUTUVB is asserted. 34 SWB I This input enables 3.3-V VAUX power to slot B. When low, AUXFLTB is cleared. This pin has an internal 100-k Ω pull-up resistor to 3VAUXI and hysteresis. 35 ATTLEDB O This output is an open-drain power output that directly drives the slot B attention indicator LED. This pin indicates the slot B LED attention indicator output signal from ALEDENB. This signal pulls low with up to 24 mA of drive when asserted and is pulled high by an on-chip 100-k Ω resistor to V5IN when deasserted. 36 PWRLEDB O This open-drain active-low power output directly drives the slot B power indicator LED. This pin indicates the slot B power LED output from PLEDENB. This signal pulls low with up to 24 mA of drive when asserted and is pulled high by an on-chip 100-k Ω resistor to V5IN when deasserted. 37 VIOSELB I This pin selects 3.3 V VIO for slot B when high, 1.5 V when low. 38 ALEDENB I This pin controls ATTLEDB. When this input is high, the LED is on (low). 39 PLEDENB I This pin controls PWRLEDB. When this input is high, the LED is on (low). 40 DIGVCC I This pin is the 3.3-V main power input to the TPS2343. Bypass this pin to DIGGND with a 0.1- µF ceramic capacitor close to the TPS2343. 41 DIGGND1 GND This pin is the ground return for the digital circuits in the TPS2343. Osolete Device |
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Similar Description - TPS2343 |
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