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CD54HC533 Datasheet(PDF) 4 Page - Texas Instruments

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Part No. CD54HC533
Description  High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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4
Three-State Leakage
Current
-VIL or
VIH
VO =
VCC or
GND
6-
-
±0.5
-
±5-
±10
µA
HCT TYPES
High Level Input
Voltage
VIH
-
-
4.5 to
5.5
2-
-
2
-
2
-
V
Low Level Input
Voltage
VIL
-
-
4.5 to
5.5
-
-
0.8
-
0.8
-
0.8
V
High Level Output
Voltage
CMOS Loads
VOH
VIH or
VIL
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
High Level Output
Voltage
TTL Loads
-6
4.5
3.98
-
-
3.84
-
3.7
-
V
Low Level Output
Voltage
CMOS Loads
VOL
VIH or
VIL
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
6
4.5
-
-
0.26
-
0.33
-
0.4
V
Input Leakage
Current
II
VCC to
GND
-
5.5
-
-
±0.1
-
±1-
±1
µA
Quiescent Device
Current
ICC
VCC or
GND
0
5.5
-
-
8
-
80
-
160
µA
Three-State Leakage
Current
-VIL or
VIH
VO =
VCC or
GND
5.5
-
-
±0.5
-
±5-
±10
µA
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆ICC
(Note 2)
VCC
-2.1
-
4.5 to
5.5
-
100
360
-
450
-
490
µA
NOTE:
2. For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA.
DC Electrical Specifications
(Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC (V)
25oC
-40oC TO 85oC
-55oC TO 125oC
UNITS
VI (V)
IO (mA)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HCT Input Loading Table
INPUT
UNIT LOADS
D0 - D7
0.15
LE
0.30
OE
0.55
NOTE: Unit Load is
∆ICC limit specified in DC Electrical Specifica-
tions table, e.g., 360
µA max at 25oC.
CD54/74HC533, CD54/74HCT533, CD54/74HC563, CD74HCT563




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