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TPS22962DNYT Datasheet(PDF) 4 Page - Texas Instruments |
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TPS22962DNYT Datasheet(HTML) 4 Page - Texas Instruments |
4 / 29 page TPS22962 SLVSCN3B – JUNE 2014 – REVISED JULY 2015 www.ti.com 7.2 ESD Ratings VALUE UNIT Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V(ESD) Electrostatic discharge V Charged-device model (CDM), per JEDEC specification JESD22- ±1000 C101(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions. 7.3 Recommended Operating Conditions Over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VIN Input voltage range 0.8 VBIAS V VBIAS Bias voltage range 2.5 5.5 V VON ON voltage range 0 5.5 V VOUT Output voltage range VIN V VIH, ON High-level voltage, ON VBIAS = 2.5 V to 5.5 V 1.2 5.5 V VIL, ON Low-level voltage, ON VBIAS = 2.5 V to 5.5 V 0 0.5 V TA Operating free-air temperature range –40 105 °C CIN Input Capacitor 1(1) µF (1) Refer to Detailed Description section. 7.4 Thermal Information TPS22962 THERMAL METRIC(1) DNY (WSON) UNIT 8 PINS RθJA Junction-to-ambient thermal resistance 44.6 °C/W RθJCtop Junction-to-case (top) thermal resistance 44.4 °C/W RθJB Junction-to-board thermal resistance 17.6 °C/W ψJT Junction-to-top characterization parameter 0.4 °C/W ψJB Junction-to-board characterization parameter 17.4 °C/W RθJCbot Junction-to-case (bottom) thermal resistance 1.1 °C/W (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 4 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: TPS22962 |
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