TPS22962

SLVSCN3B – JUNE 2014 – REVISED JULY 2015

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7.2 ESD Ratings

VALUE

UNIT

±2000

Electrostatic discharge

V

Charged-device model (CDM), per JEDEC specification JESD22-

±1000

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500-V HBM is possible with the necessary precautions.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250-V CDM is possible with the necessary precautions.

7.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

Input voltage range

0.8

V

Bias voltage range

2.5

5.5

V

ON voltage range

0

5.5

V

Output voltage range

V

High-level voltage, ON

1.2

5.5

V

Low-level voltage, ON

0

0.5

V

Operating free-air temperature range

–40

105

°C

Input Capacitor

µF

(1)

Refer to Detailed Description section.

7.4 Thermal Information

TPS22962

DNY (WSON)

UNIT

8 PINS

Junction-to-ambient thermal resistance

44.6

°C/W

Junction-to-case (top) thermal resistance

44.4

°C/W

Junction-to-board thermal resistance

17.6

°C/W

Junction-to-top characterization parameter

0.4

°C/W

Junction-to-board characterization parameter

17.4

°C/W

Junction-to-case (bottom) thermal resistance

1.1

°C/W

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

4

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