Electronic Components Datasheet Search |
|
TPS2350 Datasheet(PDF) 6 Page - Texas Instruments |
|
|
TPS2350 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 27 page TPS2350 SLUS574D – JULY 2003 – REVISED OCTOBER 2013 www.ti.com GATB: Gate drive for an external N-channel power MOSFET to select –VINB. When –VINB is more negative than –VINA, GATB is pulled 14 V above –VINB, turning on the –VINB power FET. When –VINA is more negative than –VINB, GATB is pulled down to –VINA, turning off the –VINB power FET. PG: Open-drain, active-high indication that load current is below the commanded current and the power FET is fully enhanced. When commanded load current is more than the actual load current, the linear current amplifier (LCA) will raise the power MOSFET gate voltage to fully enhance the power MOSFET. At this time, the PG output will go high. This output can be used to enable a down-stream dc-to-dc converter. The PG output is pulled to the lower of –VINA and –VINB. The PG output is able to sink 10 mA when in fault, withstand 80 V without leakage when power is not good, and withstand transients as high as 100 V when limited by a series resistor of at least 10 k Ω. OV: Over voltage comparator input. This input is typically connected to a voltage divider between RTN and SOURCE to sense the magnitude of the more negative input supply. If OV is less than 1.4 V above SOURCE, UV is more than 1.4 V above SOURCE, and there is no fault, the linear current amp will be enabled. In the event of a fault, pulling OV high or UV low will reset the fault latch and allow restarting. OV can also be used as an active-low logic enable input. The over-voltage comparator hysteresis is programmed by the equivalent resistance seen looking into the divider at the OV input. RAMP: Programming input for setting inrush current and current slew rate. An external capacitor connected between RAMP and SOURCE establishes turn-on current slew rate. During turn-on, TPS2350 charges this capacitor to establish the reference input to the LCA at 1% of the voltage from RAMP to SOURCE. The closed- loop control of the LCA and the pass FET maintains the current-sense voltage from SENSE to SOURCE at the reference potential, so the load current slew rate is directly set by the voltage ramp rate at the RAMP pin. When fully charged, RAMP can exceed SOURCE by 6 V, but the reference is internally clamped to 42 mV, limiting load current to 42 mV/RSENSE. When the output is disabled via OV, UV, or due to a load fault, the RAMP capacitor is discharged and held low to initialize for the next turn on. RTN: Positive supply input. For negative voltage systems, this pin connects directly to the return node of the input power bus. SENSE: Current sense input. An external low-value resistor connected between SENSE and SOURCE is used to monitor current magnitude. There are two internal device thresholds associated with the voltage at the SENSE pin. During ramp-up of the load capacitance or during other periods of excessive demand, the linear current amp (LCA) will regulate this voltage to 42 mV. Whenever the LCA is in current regulation mode, the capacitor at FLTTIM is charging and the timer is running. If the LCA is saturated, GAT is pulled 14 V above SOURCE. At this time, a fast fault such as a short circuit can cause the SENSE voltage to rapidly exceed 120 mV (the overload threshold). In this case, the GAT pin is pulled low rapidly, bypassing the fault timer. SOURCE: Connection to the sources of the input supply negative rail selector FETs and the negative terminal of the current sense resistor. The supply select comparator will turn on the appropriate power FET to connect SOURCE to the more negative of –VINA and –VINB. UV: Under voltage comparator input. This input is typically connected to a voltage divider between RTN and SOURCE to sense the magnitude of the more negative input supply. If UV is more than 1.4 V above SOURCE, OV is less than 1.4 V above SOURCE, and there is no fault, the linear current amp will be enabled. In the event of a fault, pulling UV low or OV high will reset the fault latch and allow restarting. UV can also be used as an active high logic enable input. The under-voltage comparator hysteresis is programmed by the equivalent resistance seen looking into the divider at the UV input. –VINA: Negative supply input A. This pin connects directly to the first input supply negative rail. –VINB: Negative supply input B. This pin connects directly to the second input supply negative rail. 6 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: TPS2350 |
Similar Part No. - TPS2350 |
|
Similar Description - TPS2350 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |