R

V

G

−

IN

IN

V

R

−

G

V+

V

O

Ref

1

2

3

4

8

7

6

5

INA128, INA129

www.ti.com

SBOS051C – OCTOBER 1995 – REVISED OCTOBER 2015

5 Pin Configuration and Functions

D and P Packages

8 Pin SOIC and PDIP

Top View

Pin Functions

PIN

I/O

DESCRIPTION

NAME

NO.

REF

5

I

Reference input. This pin must be driven by low impedance or connected to ground.

1,8

—

Gain setting pin. For gains greater than 1, place a gain resistor between pin 1 and pin 8.

V-

4

—

Negative supply

V+

7

—

Positive supply

2

I

Negative input

3

I

Positive input

6

I

Output

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Supply voltage

±18

V

Analog input voltage

±40

V

Output short circuit (to ground)

continuous

Operating temperature

–40

125

°C

Junction temperature

150

°C

Lead temperature (soldering, 10s)

300

°C

Storage temperature

–55

125

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE

UNIT

±2000

Electrostatic discharge

V

Charged-device model (CDM), per JEDEC specification JESD22-

±50

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

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