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TNETX3150A Datasheet(PDF) 11 Page - Texas Instruments |
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TNETX3150A Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 113 page  TNETX3150/TNETX3150A ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (Continued) 10-/100-/200-Mbit/s uplink MAC interface (port 00) (continued) TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION M00RXDV A18 I Receive data valid. M00RXDV indicates data on M00RXD is valid for 10-/100-Mbit/s operation. When operating in 200-Mbit/s mode in conjunction with the M00RXDVX signal, M00RXDV indicates the following (in 200-Mbit/s mode): M00RXDVX (most-significant bit), M00RXDV (least-significant bit). 00 – idle (interframe gap) 01 – data frame available 10 – idle (waiting for keytag) 11 – post tag data available M00RXDVX D19 I Receive data valid. In conjunction with the M00RXDV signal, M00RXDVX indicates the following: M00RXDVX (most-significant bit), M00RXDV (least-significant bit). 00 – idle (interframe gap) 01 – data frame available 10 – idle (waiting for keytag) 11 – post tag data available M00RXDVX must be pulled down with external resistors to operate in 10-/100-Mbit/s modes. M00RXER C19 I Receive error. M00RXER indicates reception of a coding error on received data. High = coding error Low = no coding error M00SPEED B19 I Bit-rate selection speed. The speed of the MAC interface is determined by the logic level on M00SPEED (low = 10 Mbit/s, high = 100 Mbit/s) (in 200-Mbit/s mode, M00LINK = 1). M00TCLK A19 I Transmit clock. M00TCLK source is from the external PHY or test device. M00TXD0 C20 M00TXD1 B20 Transmit data. Nibble/byte transmit data is from the TNETX3150/TNETX3150A. When M00TXEN i t d th i l t it d t Th t b M00TXD2 A20 is asserted, these signals carry transmit data. The source port number appears on M00TXD3–M00TXD0 one cycle before M00TXEN is asserted. M00TXD3 D21 O M00TXD3–M00TXD0 one cycle before M00TXEN is asserted. Data on these terminals is always synchronous to M00TCLK. The uplink can transmit 4- or 8-bit M00TXD4 C21 O Data on these terminals is always synchronous to M00TCLK. The u link can transmit 4 or 8 bit data and is determined by strapping terminal M00UPLINK: when low, the uplink operates in the 8-bit id d h hi h th ibbl bit (4 7) t d i l i 4 bit d t If th MWIDTH M00TXD5 B21 wide mode; when high, the upper-nibble bits (4–7) are not driven, leaving 4-bit data. If the MWIDTH bit in the port control register and the M00SPEED terminal are set low, then data is transmitted on M00TXD6 A21 bit in the ort control register and the M00SPEED terminal are set low, then data is transmitted on the M00TXD0 terminal. M00TXD7 D22 M00TXEN C22 O Transmit enable. M00TXEN indicates valid transmit data on M00TXD7–M00TXD0. High = valid data Low = no valid data M00TXER D20 O Transmit error. M00TXER allows coding errors to be propagated across the MIIs. When M00UPLINK is low (200-Mbit/s uplink), M00TXER is taken high when an underrun occurs in the TX FIFO port 00. This enables external logic to reconstruct and resend the frame. When M00UPLINK is high (nonuplink mode), M00TXER is asserted at the end of an under-running frame, enabling the TNETX3150/TNETX3150A to force a coding error. M00UPLINK A22 I Uplink selector. M00UPLINK, when low, selects the 8-bit uplink (200 Mbit/s) protocol. When high, M00UPLINK selects normal 10-/100-Mbit/s protocol. |
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