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TMS320C15PEL Datasheet(PDF) 6 Page - Texas Instruments

Part # TMS320C15PEL
Description  DIGITAL SIGNAL PROCESSORS
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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TMS320C15PEL Datasheet(HTML) 6 Page - Texas Instruments

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SPRS009C – JANUARY 1987 – REVISED JULY 1991
TMS320C1x
DIGITAL SIGNAL PROCESSORS
POST OFFICE BOX 1443
HOUSTON, TEXAS 77001
6
interrupts and subroutines
All devices except the
′C16 contain a four-level stack for saving the contents of the program counter during
interrupts and subroutine calls. Because of the larger 64K program space, the
′C16’s hardware stack has been
increased to eight levels. Instructions are available for saving the device’s complete context. PUSH and POP
instructions permit a level of nesting restricted only by the amount of available RAM. The interrupts used in these
devices are maskable.
input/output
The 16-bit parallel data bus can be utilized to perform I/O functions in two cycles. The I/O ports are addressed
by the three LSBs on the address lines. In addition, a polling input for bit test and jump operations (BIO) and
an interrupt pin (INT) have been incorporated for multitasking. The bit selectable I/O of the
′C14 is suitable for
microcontroller applications.
serial port (TMS320C17/E17)
Two of the I/O ports on the
′C17/E17 are dedicated to the serial port and companding hardware. I/O port 0 is
dedicated to control register 0, which controls the serial port, interrupts, and companding hardware. I/O port 1
accesses control register 1, as well as both serial port channels, and companding hardware. The six remaining
I/O ports are available for external parallel interfaces.
serial port (TMS320C14/E14)
The
′C14/E14 devices include one I/O-mapped serial port that operates asynchronously. I/O-mapped control
registers are used to configure port parameters such as inter-processor communication protocols and baud
rate.
companding hardware (TMS320C17/E17)
On-chip hardware enables the
′C17/E17 to compand (COMpress/exPAND) data in either µ-law or A-law format.
The companding logic operation is configured via the system control register. Data may be companded in either
serial mode for operation on serial port data (converting between linear and logarithmic PCM) or a parallel mode
for computation inside the device. The
′C17/E17 allows the hardware companding logic to operate with either
sign-magnitude or twos-complement numbers.
coprocessor port (TMS320C17/E17)
The coprocessor port on the
′C17/E17 provides a direct connection to most microcomputers and
microprocessors. The port is accessed through I/O port 5 using IN and OUT instructions. The coprocessor
interface allows the device to act as a peripheral (slave) microcomputer to a microprocessor, or as a master to
a peripheral microcomputer. In the microcomputer mode, the 16 data lines are used for the 6 parallel 16-bit I/O
ports. In the coprocessor mode, the 16-bit parallel port is reconfigured to operate as a 16-bit latched bus
interface. For peripheral transfer, an 8-bit or 16-bit length of the coprocessor port can be selected.


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