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XTR101AG Datasheet(PDF) 2 Page - Texas Instruments

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Part # XTR101AG
Description  Precision, Low Drift 4-20mA TWO-WIRE TRANSMITTER
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

XTR101AG Datasheet(HTML) 2 Page - Texas Instruments

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XTR101
SBOS146A − OCTOBER 1986 − REVISED AUGUST 2004
www.ti.com
2
ABSOLUTE MAXIMUM RATINGS(1)
Power Supply, +VCC
40V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Voltage, e1 or e2
≥ VOUT, ≤ +VCC
. . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, Ceramic
−55
°C to +165°C
. . . . . . . . .
Plastic
−55
°C to +125°C
. . . . . . . . . .
Lead Temperature (soldering, 10s) G, P
+300
°C
. . . . . . . . . . . . . . .
(wave soldering, 3s) U
+260
°C
. . . . . . . . . . . . . .
Output Short-Circuit Duration
Continuous +VCC to IOUT
. . . . . . .
Junction Temperature
+165
°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not supported.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
PRODUCT
PACKAGE-
LEAD
PACKAGE
DESIGNATOR(1)
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
Ceramic
JD
XTR101AG
Ceramic
DIP-14
JD
XTR101BG
XTR101
Plastic
DIP-14
N
−40
°C to +85°C
XTR101AP
SO-16
DW
XTR101AU
(1)
For the most current package and ordering information, see the Package
Option Addendum located at the end of this data sheet.
PIN CONFIGURATION
Top View
DIP
Top View
SO
Zero Adjust
Zero Adjust
−In
+In
Span
Span
Out
Zero Adjust
Bandwidth
BControl
I
REF2
I
REF1
E
+V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
DIP
Zero Adjust
Zero Adjust
−In
+In
Span
Span
Out
NC
Zero Adjust
Bandwidth
BControl
I
REF2
I
REF1
E
+V
CC
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SOL−16
Surface−Mount
NC = No Connection


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