TPS70345, TPS70348, TPS70351, TPS70358, TPS70302

DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS

WITH POWER UP SEQUENCING FOR SPLIT VOLTAGE DSP SYSTEMS

SLVS285A – AUGUST 2000 – REVISED OCTOBER 2002

7

POST OFFICE BOX 655303

detailed description (continued)

power good (PG1)

manual reset pins (MR1 and MR2)

MR1 and MR2 are active low input terminals used to trigger a reset condition. When either MR1 or MR2 is pulled

to logic low, a POR (RESET) occurs. These terminals have a 6-

The sense terminals of fixed-output options must be connected to the regulator output, and the connection

should be as short as possible. Internally, the sense terminals connect to high-impedance wide-bandwidth

amplifiers through resistor-divider networks and noise pickup feeds through to the regulator output. It is

essential to route the sense connections in such a way to minimize/avoid noise pickup. Adding RC networks

regulators to oscillate.

FB1 and FB2

FB1 and FB2 are input terminals used for adjustable-output devices and must be connected to the external

feedback resistor divider. FB1 and FB2 connections should be as short as possible. It is essential to route them

terminals to filter noise is not recommended because it can cause the regulators to oscillate.

RESET indicator

RESET is an active low, open drain output and requires a pullup resistor for normal operation. When pulled up,

RESET goes to a high impedance state (i.e. logic high) after a 120 ms delay when all three of the following