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TMS28F020-12C4FML Datasheet(PDF) 8 Page - Texas Instruments

Part # TMS28F020-12C4FML
Description  Latchup Immunity of 250 mA on All Input
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS28F020-12C4FML Datasheet(HTML) 8 Page - Texas Instruments

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TMS28F020
262144 BY 8 BIT
FLASH MEMORY
SMJS020C − OCTOBER 1994 − REVISED JANUARY 1998
8
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
program-verify command
The TMS28F020 can be programmed sequentially or randomly because it is programmed one byte at a time.
Each byte must be verified after it is programmed. The program-verify operation prepares the device to verify
the most recently programmed byte. To invoke the program-verify operation, C0h must be written into the
command register. The program-verify operation ends on the rising edge of W.
While verifying a byte, the TMS28F020 applies an internal margin voltage to the designated byte. If the true data
and programmed data match, programming continues to the next designated byte location; otherwise, the byte
must be reprogrammed. Figure 2 shows how commands and bus operations are combined for byte
programming.
reset command
To reset the TMS28F020 after set-up-erase command or set-up-program command operations without
changing the contents in memory, write FFh into the command register two consecutive times. After executing
the reset command, the device will default to the read mode.
Fastwrite algorithm
The TMS28F020 is programmed using the Texas Instruments Fastwrite algorithm shown in Figure 2. This
algorithm programs in a nominal time of four seconds.
Fasterase algorithm
The TMS28F020 is erased using the Texas Instruments Fasterase algorithm shown in Figure 1. The memory
array needs to be completely programmed (using the Fastwrite algorithm) before erasure begins. Erasure
typically occurs in two seconds.
parallel erasure
To reduce total erase time, several devices can be erased in parallel. Since each Flash memory can erase at
a different rate, every device must be verified separately after each erase pulse. After a given device has been
successfully erased, the erase command should not be issued to this device again for this erase cycle. All
devices that complete erasure should be masked until the parallel erasure process is finished (see Figure 3).
Examples of how to mask a device during parallel erase include driving E high, writing the read command (00h)
to the device when the others receive a set-up-erase or erase command, or disconnecting it from all electrical
signals with relays or other types of switches.


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