DS75161AWM datasheet(3/10 Pages) NSC

Part #	DS75161AWM

Description	IEEE-488 GPIB Transceivers

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Manufacturer	NSC [National Semiconductor (TI)]

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Switching Characteristics (Note 7)

V

CC = 5.0V ±5%,TA = 0˚C to 70˚C

Symbol

Parameter

From

To

Conditions

DS75160A

DS75161A

DS75162A

Units

Min Typ Max Min Typ Max Min Typ Max

t

PLH

Propagation Delay Time,

V

L = 2.3V

10

20

10

20

10

20

ns

Low to High Level Output

Terminal

Bus

R

L = 38.3Ω

t

PHL

Propagation Delay Time,

C

L = 30 pF

14

20

14

20

14

20

ns

High to Low Level Output

Figure 1

t

PLH

Propagation Delay Time,

V

L = 5.0V

14

20

14

20

14

20

ns

Low to High Level Output

Bus

Terminal R

L = 240Ω

t

PHL

Propagation Delay Time,

C

L = 30 pF

10

20

10

20

10

20

ns

High to Low Level Output

Figure 2

t

PZH

Output Enable Time

V

I = 3.0V

19

32

23

40

23

40

ns

to High Level

V

L = 0V

t

PHZ

Output Disable Time

TE, DC,

R

L = 480Ω

15

22

15

25

15

25

ns

From High Level

or SC

C

L = 15 pF

Figure 1

t

PZL

Output Enable Time

(Note 8)

Bus

V

I = 0V

24

35

28

48

28

48

ns

to Low Level

(Note 9)

V

L = 2.3V

t

PLZ

Output Disable Time

R

L = 38.3Ω

17

25

17

27

17

27

ns

From Low Level

C

L = 15 pF

Figure 1

t

PZH

Output Enable Time

V

I = 3.0V

17

33

18

40

18

40

ns

to High Level

V

L = 0V

t

PHZ

Output Disable Time

TE, DC,

R

L = 3kΩ

15

25

22

33

22

33

ns

From High Level

or SC

Terminal C

L = 15 pF

Figure 1

t

PZL

Output Enable Time

(Note 8)

V

I = 0V

25

39

28

52

28

52

ns

to Low Level

(Note 9)

V

L = 5V

t

PLZ

Output Disable Time

R

L = 280Ω

15

27

20

35

20

35

ns

From Low Level

C

L = 15 pF

Figure 1

t

PZH

Output Pull-Up Enable

V

I = 3V

10

17

NA

ns

Time (DS75160A Only)

PE

Bus

V

L = 0V

t

PHZ

Output Pull-Up Disable

(Note 8)

R

L = 480Ω

10

15

NA

ns

Time (DS75160A Only)

C

L = 15 pF

Figure 1

Note 7: Typical values are for VCC = 5.0V and TA = 25˚C and are meant for reference only.

Note 8: Refer to Functional Truth Tables for control input definition.

Note 9: Test configuration should be connected to only one transceiver at a time due to the high current stress caused by the VI voltage source when the output con-

nected to that input becomes active.

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