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TMS320C242PGS Datasheet(PDF) 10 Page - Texas Instruments |
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TMS320C242PGS Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 74 page  TMS320C242 DSPCONTROLLER SPRS063D − DECEMBER 1997 − REVISED SEPTEMBER 2000 10 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 Terminal Functions - C242 PG and FN Packages (Continued) NAME 64-PIN QFP 68-PIN PLCC TYPE† RESET STATE‡ DESCRIPTION NAME NO. NO. TYPE† STATE‡ DESCRIPTION SUPPLY SIGNALS VDD 9 16 − − Digital logic supply voltage (5 V) VDD 41 52 − − Digital logic supply voltage (5 V) − 42 − − VDDO 1 8 − − Digital logic and buffer supply voltage (5 V) VDDO 34 45 − − Digital logic and buffer supply voltage (5 V) 51 62 − − − 41 − − VSS 10 17 − − Digital logic ground reference VSS 40 51 − − Digital logic ground reference − 43 − − Digital logic and buffer ground reference 2 9 − − VSSO 26 34 − − Digital logic and buffer ground reference VSSO 33 44 − − Digital logic and buffer ground reference 50 61 − − NO CONNECT NC − 27 No internal connection made to this pin DNC 25 33 − − Do not connect. Reserved for test. † I = input, O = output, Z = high impedance ‡ The reset state indicates the state of the pin at reset. If the pin is an input, indicated by an I, its state is determined by user design. If the pin is an output, its level at reset is indicated. § These pins are internally pulled low. However, these pins are not internally pulled low in F243/F241. ¶ These pins are internally pulled high. However, these pins are not internally pulled high in F243/F241. # The PMT pin should be connected to GND on F243/F241. On the C242, this pin can be left open or connected to GND. NOTE: Bold, italicized pin names indicate pin function after reset. LEGEND: ↑ − Internal pullup ↓ − Internal pulldown (Typical active pullup/pulldown value is 150 µA.) |
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