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K4S561633F Datasheet(PDF) 3 Page - Samsung semiconductor |
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K4S561633F Datasheet(HTML) 3 Page - Samsung semiconductor |
3 / 12 page K4S561633F - X(Z)E/N/G/C/L/F February 2004 Mobile-SDRAM 54Ball(6x9) BOC 123 789 A VSS DQ15 VSSQ VDDQ DQ0 VDD B DQ14 DQ13 VDDQ VSSQ DQ2 DQ1 C DQ12 DQ11 VSSQ VDDQ DQ4 DQ3 D DQ10 DQ9 VDDQ VSSQ DQ6 DQ5 E DQ8 NC VSS VDD LDQM DQ7 F UDQM CLK CKE CAS RAS WE G A12 A11 A9 BA0 BA1 CS H A8A7A6A0A1 A10 J VSS A5 A4 A3 A2 VDD Pin Name Pin Function CLK System Clock CS Chip Select CKE Clock Enable A0 ~ A12 Address BA0 ~ BA1 Bank Select Address RAS Row Address Strobe CAS Column Address Strobe WE Write Enable L(U)DQM Data Input/Output Mask DQ0 ~ 15 Data Input/Output VDD/VSS Power Supply/Ground VDDQ/VSSQ Data Output Power/Ground Symbol Min Typ Max A 1.00 1.10 1.20 A1 0.30 0.35 0.40 E - 8.00 - E1 -6.40- D- 11.00 - D1 -6.40- e - 0.80 - b 0.45 0.50 0.55 z- - 0.10 [Unit:mm] Package Dimension and Pin Configuration < Top View*2 > < Bottom View*1 > 21 3 8 97 F E D C B J H G A E1 E E/2 < Top View*2 > *2: Top View A A1 z b Encapsulant Max. 0.20 *1: Bottom View #A1 Ball Origin Indicator |
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