Si9120

Vishay Siliconix

www.vishay.com

6

Document Number: 70006

S-42042—Rev. H, 15-Nov-04

DETAILED DESCRIPTION (CONT’D)

Reference Section

The reference section of the Si9120 consists of a temperature

compensated buried zener and trimmable divider network.

The output of the reference section is connected internally to

the non-inverting input of the error amplifier. Nominal reference

output voltage is 4 V. The trimming procedure that is used on

the Si9120 brings the output of the error amplifier (which is

configured for unity gain during trimming) to within "2% of 4 V.

This compensates for input offset voltage in the error amplifier.

The output impedance of the reference section has been

purposely made high so that a low impedance external voltage

source can be used to override the internal voltage source, if

desired, without otherwise altering the performance of the

device.

Error Amplifier

Closed-loop regulation is provided by the error amplifier, which

is intended for use with “around-the-amplifier” compensation.

A MOS differential input stage provides for high input

impedance. The noninverting input to the error amplifier

supply and should be bypassed with a small capacitor to

ground.

Oscillator Section

The oscillator consists of a ring of CMOS inverters, capacitors,

and a capacitor discharge switch. Frequency is set by an

external resistor between the OSC IN and OSC OUT pins.

(See Typical Characteristics for details of resistor value vs.

normal internal oscillator operation. A frequency divider in the

logic section limits switch duty cycle to v 50% by locking the

switching frequency to one half of the oscillator frequency.

SHUTDOWN and RESET

SHUTDOWN (pin 12) and RESET (pin 13) are intended for

overriding the output MOSFET switch via external control

logic. The two inputs are fed through a latch preceding the

output switch. Depending on the logic state of RESET.

SHUTDOWN can be either a latched or unlatched input. The

output is off whenever SHUTDOWN is low. By simultaneously

having SHUTDOWN and RESET low, the latch is set and

SHUTDOWN has no effect until RESET goes high. See

Table TABLE 1.

Both pins have internal current source pull-ups and should be

left disconnected when not in use. An added feature of the

current sources is the ability to connect a capacitor and an

open-collector driver to the SHUTDOWN or RESET pins to

provide variable shutdown time.

TABLE 1.

TRUTH TABLE FOR SHUTDOWN AND

RESET PINS

SHUTDOWN

RESET

OUTPUT

H

H

Normal Operation

H

Normal Operation (No Change)

L

H

Off (Not Latched)

L

L

Off (Latched)

L

Off (Latched—No Change)

Output Driver

The push-pull driver output has a typical on-resistance of 20-W

maximum switching times are specified at 75 ns for a 500-pF

load. This is sufficient to directly drive MOSFETs such as the

IRF820, BUZ78 or BUZ80. Larger devices can be driven, but

switching times will be longer, resulting in higher switching

losses.

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and

Package Reliability represent a composite of all qualified locations.

For related documents such as package/tape drawings, part marking, and reliability data, see

http://www.vishay.com/ppg?70006.