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TM248CBK32F Datasheet(PDF) 5 Page - Texas Instruments |
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TM248CBK32F Datasheet(HTML) 5 Page - Texas Instruments |
5 / 9 page TM124BBK32F, TM124BBK32U 1048576 BY 32BIT DYNAMIC RAM MODULE TM248CBK32F, TM248CBK32U 2097152 BY 32BIT DYNAMIC RAM MODULE SMMS649A − DECEMBER 1994 − REVISED JUNE 1995 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)† PARAMETER TEST CONDITIONS ’248CBK32F - 60 ’248CBK32F - 70 ’248CBK32F - 80 UNIT PARAMETER TEST CONDITIONS MIN MAX MIN MAX MIN MAX UNIT VOH High-level output voltage IOH = − 5 mA 2.4 2.4 2.4 V VOL Low-level output voltage IOL = 4.2 mA 0.4 0.4 0.4 V II Input current (leak- age) VCC = 5.5 V, VI = 0 V to 6.5 V, All other pins = 0 V to VCC ± 10 ± 10 ± 10 µA IO Output current (leakage) VCC = 5.5 V, VO = 0 V to VCC, CAS high ± 20 ± 20 ± 20 µA ICC1 Read- or write-cycle current (see Note 3) VCC = 5.5 V, Minimum cycle 184 164 144 mA ICC2 Standby current VIH = 2.4 V (TTL), After 1 memory cycle, RAS and CAS high 8 8 8 mA ICC2 Standby current VIH = VCC − 0.2 V (CMOS), After 1 memory cycle, RAS and CAS high 4 4 4 mA ICC3 Average refresh current (RAS only or CBR) (see Note 3) VCC = 5.5 V, Minimum cycle, RAS cycling, CAS high (RAS only); RAS low after CAS low (CBR) 360 320 280 mA ICC4 Average page current (see Note 4) VCC = 5.5 V, tPC = MIN, RAS low, CAS cycling 184 164 144 mA † For test conditions shown as MIN / MAX, use the appropriate value specified under recommended operating conditions. NOTES: 3. Measured with a maximum of one address change while RAS = VIL 4. Measured with a maximum of one address change while CAS = VIH capacitance over recommended ranges of supply voltage and operating free-air temperature, f = 1 MHz (see Note 5) PARAMETER ’124BBK32F ’248CBK32F UNIT PARAMETER MIN MAX MIN MAX UNIT Ci(A) Input capacitance, A0 − A9 10 20 pF Ci(R) Input capacitance, RAS inputs 7 7 pF Ci(C) Input capacitance, CAS inputs 7 14 pF Ci(W) Input capacitance, W 14 28 pF Co(DQ) Output capacitance on DQ0 −DQ31 7 14 pF NOTE 5: VCC = 5 V ± 0.5 V, and the bias on pins under test is 0 V. |
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