UCC2585

UCC3585

SLUS304F − JULY 1999 − REVISED JANUARY 2005

5

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pin descriptions

CT: A high quality ceramic capacitor connected between this pin and ground sets the PWM oscillator frequency

by the following relationship:

f

+

1

7000

C

T

The oscillator is capable of reliable operation up to 500 kHz.

switching of the output drivers. Do not allow ENB to remain between these levels steady state.

GND: Reference level for the IC. All voltages and currents are with respect to GND.

ISENSE: ISENSE monitors the voltage dropped across the high side P-channel MOSFET switch while it is

conducting. This information is used to detect overcurrent conditions by the current limit circuitry.

ISET: A resistor is connected between ISET and ground to program a precision bias for many of the UCC3585

circuit blocks. This resistor should be 100 k

Ω with a maximum tolerance of 5%. 1.25 V is provided to ISET via

directly over to CLSET to program the overcurrent threshold.

NDRV: High current driver output for the low side N-channel MOSFET switch.

PDRV: High current driver output for the high side P-channel MOSFET switch.

PWRGND: High current return path for the MOSFET drivers. PWRGND and GND should be terminated

together as close as possible to the device package .

SD: This pin can configure current limit to operate in any one of three different ways.

1.

A forced voltage of less than 250 mV on SD inhibits the shutdown function causing pulse by pulse limiting.

2.

A capacitor from SD to GND provides a controller-converter shutdown timeout after seven consecutive

overcurrent signals are received by the current limit circuitry. An internal 11-

µA (typ) current sink

discharges the SD capacitor to the 0.55-V (typ) restart threshold. The shutdown time is given by:

t

SHUT +

C

SD

V

IN *

0.55 V

11

mA

At this point, a softstart cycle is initiated, and a 1-mA current source (typ) quickly recharges SD to VIN.

During softstart, pulse-by-pulse current limiting is enabled, and the 7-cycle counter is disabled until

softstart is complete (i.e. charged to approximately VIN volts).

3.

A forced voltage of greater than 1 V on SD will cause the UCC3585 to latch off after seven overcurrent

signals are received. After the controller is latched off, SD must drop below 250 mV to restart the

controller.

SS: A low leakage capacitor connected between SS and GND will provide a softstart function for the converter.

The voltage on this capacitor slowly charges on start-up via an internal 13.5

µA (typ.) current source. The output

of the voltage error amplifier (COMP) tracks this voltage, thereby limiting the controller duty ratio.

VFB: Inverting input to the voltage type error amplifier. The common mode input range for VFB extends from

GND to 1.5 V.

VIN: Supply voltage for the UCC3585. Bypass with a 0.1-

µF ceramic capacitor (minimum) to supply the peak

gate drive currents required to change and discharge the power MOSFET gates. See application information

for details.

UCC3585 Not Recommended for New Designs