Over Supply Voltage and Operating Temperature ranges, unless otherwise specified

Symbol

Parameter

Conditions

Reference

Min

Typ

Max

Units

RECEIVER CHARACTERISTICS

I

OSR

Short Circuit Current

V

RO

7

35

85

mA

I

OZR

TRI-STATE Leakage

Current

V

DEVICE CHARACTERISTICS

V

IH

High Level Input Voltage

DE,

RE*,

DI

2.0

V

CC

V

V

IL

Low Level Input Voltage

GND

0.8

V

I

IH

High Level Input Current

V

2µA

I

IL

Low Level Input Current

V

V

−2

µA

V

−2

µA

I

CC

Power Supply Current

(No Load)

Driver and Receiver ON

V

CC

200

500

µA

I

CCR

Driver OFF, Receiver ON

200

500

µA

I

CCD

Driver ON, Receiver OFF

200

500

µA

I

CCX

Sleep Mode

0.2

10

µA

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified

Symbol

Parameter

Conditions

Reference

Min

Typ

Max

Units

DRIVER CHARACTERISTICS

t

PHLD

Differential Propagation

Delay High to Low

R

Figures 5, 6

10

39

80

ns

t

PLHD

Differential Propagation

Delay Low to High

10

40

80

ns

t

SKD

Differential Skew

0

1

10

ns

|t

t

r

Rise Time

325

50

ns

t

f

Fall Time

325

50

ns

t

PHZ

Disable Time High to Z

C

RE*=L

Figures 7, 8

80

200

ns

t

PLZ

Disable Time Low to Z

Figures 9, 10

80

200

ns

t

PZH

Enable Time Z to High

C

RE*=L

Figures 7, 8

50

200

ns

t

PZL

Enable Time Z to Low

Figures 9, 10

65

200

ns

t

PSH

Driver Enable from Sleep

C

Figures 7, 8

70

98

250

ns

Mode to Output High

(Note 11)

t

PSL

Driver Enble from Sleep

C

Figures 9, 10

70

98

250

ns

Mode to Output Low

(Note 11)

RECEIVER CHARACTERISTICS

t

PHL

Propagation Delay

C

Figures 12, 13

30

210

400

ns

High to Low

t

PLH

Propagation Delay

30

190

400

ns

Low to High

t

SK

Skew, |t

0

20

50

ns

t

PLZ

Output Disable Time

C

Figures 14, 15,

16

50

150

ns

t

PHZ

DE = H

55

150

ns

t

PZL

Output Enable Time

40

150

ns

t

PZH

45

150

ns

t

PSH

Receiver Enable from Sleep

C

Figures 14, 16

70

97

250

ns

Mode to Output High

(Note 11)

t

PSL

Receiver Enable from Sleep

C

Figures 14, 15

70

95

250

ns

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