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UC39431B Datasheet(PDF) 4 Page - Texas Instruments |
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UC39431B Datasheet(HTML) 4 Page - Texas Instruments |
4 / 8 page 4 UC19431 UC29431 UC39431 UC39431B Magnetic Amplifier Controller Application The 0.4% initial reference makes the UC39431 ideal as a programmable shunt regulator. By adding two external resistors, the on-chip 1.3V reference can be gained to any voltage between 2.2V (2.4V for the UC39431) and 36.0V. The input bias current is typically maintained at 0.2µA for the output voltage range. Since the non-inverting error amplifier input is not available, a 5.1k non-inverting input impedance is added to the input of the error amplifier. This allows the user to choose the SENSE pin input impedance to cancel the minimal offset voltage caused by the input bias current. Frequency Compensation The UC39431 shunt regulator is designed with two independant gain stages. The error amplifier provides 90dB of gain with a typical gain bandwidth product of 5MHz. The error amplifier provides sufficient gain in or- der for the sense voltage to be accurately compared to the 1.3V on-chip reference. Complete control of the fre- quency response of the error amplifier is accomplished with the COMP pin. By putting negative feedback across the error amplifier, either a pole or a pole-zero can be added. The second gain stage is the transconductance (gm) am- plifier. The gm amplifier is designed with a known linear 140mS of transconductance. The voltage gain is conse- quently gm • Ro, where Ro is the output impedance at the collector pin. The frequency response of the transconductance amplifier is controlled with the COLL pin. The gain bandwidth product of the gm amplifier is typically 3MHz. A pole or pole-zero can be added to this stage by connecting a capacitor or a series capacitor and resistor between COLL and GND. The compensation of a control loop containing the UC39431 is made easier due to the independant com- pensation capability of the error amplifier and gm ampli- fier. As shown in the applications information, a pole-zero is created with a series resistor and capacitor between SENSE and COMP. The pole created is dominant, while the zero is used to increase the bandwidth and cancel the effects of the pole created by the capacitor between the COLL and GND pins. APPLICATION INFORMATION 6 5 7 4 20k 4k REF 2.85k 2 22.4k 16k 5.1 Ω 8 1 3 1.3V 0.5V GND COLL I COLL 40.2K 6.8nF 21K V SENSE R1 R2 R3 SENSE 2K COMP VCC Figure 2. 15.0V optocoupler application. UDG-99051 |
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