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7004 Datasheet(PDF) 10 Page - Fairchild Semiconductor |
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7004 Datasheet(HTML) 10 Page - Fairchild Semiconductor |
10 / 12 page 10 Rev. A, June 2001 ©2001 Fairchild Semiconductor Corporation Table 1 shows the comparison of the topologies that have been discussed. Note that the rela- tive cost increases significantly based on whether there is input/output isolation. Efficiency can range from 70 to 85%. A summary of the first-pass selection of key MOSFET parameters is shown in Table 2. Parameters of the MOSFETS used in Application Note are shown in Table 3. Table 1: Comparison of various switching regulator topologies. Table 2: Power MOSFET voltage and current ratings versus power supply topology. Table 3: PowerTrench® MOSFETs in SO-8 package for 48V Applications. Synchronous rectification. Synchronous rectification may be employed with all the previously mentioned topologies. This technique consists of replacing the output rectifiers with MOSFETs, striving to lower conduc- tion losses. The concept is, however, not without its share of problems. The complexity of the drive and control circuitry increases dramatically. Timing of the gate-drive to the synchronous FETs is critical to avoid cross conduction. The parasitic capacitances and body diode reverse recovery characteristics of the output FETs contribute to substantial switching losses in these devices. The technique is most applicable for 12V and lower output voltages. The lower the output voltage, the greater the advantage of synchronous rectification. Much above the 12V level, the large parasitic losses make the approach much less advantageous. Thermal Considerations One of the main limiting factors in any power supply design is the ability to keep the junction temperatures of the power devices within specified limits. When using surface-mount power devices the primary heat sink is the PC board. The main constituents of PCBs are fiberglass Topology Max. Power (Watts) Typical Efficiency (%) Flyback 30 75 1 Transistor Forward 150 80 2 Transistor Forward 200 83 Push Pull 350 80 Full Bridge 500 85 Topology Maximum Drain Voltage Average Drain Current Flyback 1.5Vin(max) 751.5Pout/ Vin(max) 1 Transistor Forward 2.5 to 3.0 Vin(max) 1.3Pout/ Vin(max)0 2 Transistor Forward Vin(max) 1.2Pout/ Vin(max) Push Pull 352.5 to 3.0 Vin(max)0 0.65Pout/ Vin(max) Full Bridge Vin(max) 0.60Pout/ Vin(max) Voltage(DS) Current (ID max) ON-Resistance (@VGS=10V) FDS3570 80V 9 A 20 m Ω FDS3670 100V 6.3A 32 m Ω FDS2570 150V 4 A 80 m Ω FDS2670 200V 3 A 130 m Ω |
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