LP5912-0.9DRVR datasheet(4/33 Pages) TI1

Part #	LP5912-0.9DRVR

Description	LP5912 500-mA Ultra-Low-Noise LDO for RF and Analog Circuits ??Requires No Bypass Capacitor

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Manufacturer	TI1 [Texas Instruments]

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4

LP5912

SNVSA77B – DECEMBER 2015 – REVISED JUNE 2016

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(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltages are with respect to the GND pin.

(3)

Internal thermal shutdown circuitry protects the device from permanent damage.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1) (2)

MIN

MAX

UNIT

VIN

Input voltage

–0.3

7

V

VOUT

Output voltage

–0.3

7

V

VEN

Enable input voltage

-0.3

7

V

VPG

Power Good (PG) pin OFF voltage

–0.3

7

V

TJ

Junction temperature

150

°C

PD

Continuous power dissipation(3)

Internally Limited

W

Tstg

Storage temperature

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process..

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250-V CDM is possible with the necessary precautions.

7.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

±1000

(1)

All voltages are with respect to the GND pin.

(2)

TJ-MAX-OP = (TA(MAX) + (PD(MAX) × RθJA )).

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

VIN

Input supply voltage

1.6

6.5

V

VOUT

Output voltage

0.8

5.5

VEN

Enable input voltage

0

VIN

VPG

PG pin OFF voltage

0

6.5

IOUT

Output current

0

500

mA

TJ-MAX-OP

Operating junction temperature(2)

–40

125

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2)

Thermal resistance value RθJA is based on the EIA/JEDEC High-K printed circuit board defined by: JESD51-7 - High Effective Thermal

Conductivity Test Board for Leaded Surface Mount Packages.

(3)

The PCB for the WSON (DRV) package RθJA includes two (2) thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5.

7.4 Thermal Information

THERMAL METRIC(1)

LP5912

UNIT

DRV (WSON)

6 PINS

RθJA

Junction-to-ambient thermal resistance, High-K(2)

71.2(3)

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

93.7

°C/W

RθJB

Junction-to-board thermal resistance

40.7

°C/W

ψJT

Junction-to-top characterization parameter

2.5

°C/W

ψJB

Junction-to-board characterization parameter

41.1

°C/W

RJC(bot)

Junction-to-case (bottom) thermal resistance

11.2

°C/W

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