DS1647/DS1647P

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PIN DESCRIPTION

A0-A18

- Address Input

CE

- Chip Enable

OE

- Output Enable

WE

- Write Enable

- +5V

GND

- Ground

DQ0-DQ7

- Data Input/Output

NC

- No Connection

PFO

- Power-fail Output

(DS1647P only)

X1, X2

- Crystal Connection

- Battery Connection

DESCRIPTION

The DS1647 is a 512k x 8 nonvolatile static RAM with a full-function real-time clock, which are both

accessible in a byte-wide format. The nonvolatile timekeeping RAM is functionally equivalent to any

JEDEC standard 512k x 8 SRAM. The device can also be easily substituted for ROM, EPROM and

EEPROM, providing read/write nonvolatility and the addition of the real-time clock function. The real-

time clock information resides in the eight uppermost RAM locations. The RTC registers contain year,

month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for the day of the

month and leap year are made automatically. The RTC clock registers are double-buffered to avoid access

of incorrect data that can occur during clock update cycles. The double-buffered system also prevents

time loss as the timekeeping countdown continues unabated by access to time register data. The DS1647

tolerance condition. This feature prevents loss of data from unpredictable system operation brought on by

PACKAGES

The DS1647 is available in two packages: 32-pin DIP and 34-pin PowerCap module. The 32-pin DIP

style module integrates the crystal, lithium energy source, and silicon all in one package. The 34-pin

PowerCap Module Board is designed with contacts for connection to a separate PowerCap (DS9034PCX)

that contains the crystal and battery. This design allows the PowerCap to be mounted on top of the

DS1647P after the completion of the surface mount process. Mounting the PowerCap after the surface

mount process prevents damage to the crystal and battery due to the high temperatures required for solder

reflow. The PowerCap is keyed to prevent reverse insertion. The PowerCap Module Board and PowerCap

are ordered separately and shipped in separate containers. The part number for the PowerCap is

DS9034PCX.

CLOCK OPERATIONS - READING THE CLOCK

While the double-buffered register structure reduces the chance of reading incorrect data, internal updates

to the DS1647 clock registers should be halted before clock data is read to prevent reading of data in

transition. However, halting the internal clock register updating process does not affect clock accuracy.

Updating is halted when a 1 is written into the read bit, the 7th most significant bit in the control register.

As long as 1 remains in that position, updating is halted. After a halt is issued, the registers reflect the

count, that is day, date, and time that was present at the moment the halt command was issued. However,

the internal clock registers of the double-buffered system continue to update so that clock accuracy is not

affected by the access of data. All of the DS1647 registers are updated simultaneously after the clock

status is reset. Updating is within a second after the read bit is written to 0.