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TLC7733QPWRG4Q1 Datasheet(PDF) 1 Page - Texas Instruments |
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TLC7733QPWRG4Q1 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 18 page TLC7701-Q1, TLC7705-Q1, TLC7733-Q1 MICROPOWER SUPPLY VOLTAGE SUPERVISORS SGLS208A − OCTOBER 2003 − REVISED MAY 2008 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Qualified for Automotive Applications D Power-On Reset Generator D Automatic Reset Generation After Voltage Drop D Precision Voltage Sensor D Temperature-Compensated Voltage Reference D Programmable Delay Time by External Capacitor D Supply Voltage Range ...2 V to 6 V D Defined RESET Output from V DD ≥ 1 V D Power-Down Control Support for Static RAM With Battery Backup D Maximum Supply Current of 16 μA D Power Saving Totem-Pole Outputs description The TLC77xx family of micropower supply voltage supervisors provide reset control, primarily in microcomputer and microprocessor systems. During power-on, RESET is asserted when VDD reaches 1 V. After minimum VDD (≥ 2 V) is established, the circuit monitors SENSE voltage and keeps the reset outputs active as long as SENSE voltage (VI(SENSE)) remains below the threshold voltage. An internal timer delays return of the output to the inactive state to ensure proper system reset. The delay time, td, is determined by an external capacitor: td = 2.1 × 104 × CT Where CT is in farads td is in seconds Except for the TLC7701, which can be customized with two external resistors, each supervisor has a fixed SENSE threshold voltage set by an internal voltage divider. When SENSE voltage drops below the threshold voltage, the outputs become active and stay in that state until SENSE voltage returns above threshold voltage and the delay time, td, has expired. In addition to the power-on-reset and undervoltage-supervisor function, the TLC77xx adds power-down control support for static RAM. When CONTROL is tied to GND, RESET will act as active high. The voltage monitor contains additional logic intended for control of static memories with battery backup during power failure. By driving the chip select (CS) of the memory circuit with the RESET output of the TLC77xx and with the CONTROL driven by the memory bank select signal (CSH1) of the microprocessor (see Figure 10), the memory circuit is automatically disabled during a power loss. (In this application the TLC77xx power has to be supplied by the battery.) Copyright © 2008, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 8 7 6 5 CONTROL RESIN CT GND VDD SENSE RESET RESET PW PACKAGE (TOP VIEW) |
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