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HV6810PJ-G Datasheet(PDF) 7 Page - Supertex, Inc |
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HV6810PJ-G Datasheet(HTML) 7 Page - Supertex, Inc |
7 / 9 page 7 HV6810 Supertex inc. www.supertex.com Doc.# DSFP-HV6810 E070913 20-Lead SOW (WG) Pin # Function Description 1 Q8 High voltage output. 2 Q7 3 Q6 4 CLOCK Input data are shifted into the data shift register on the positive edge of the clock. 5 VSS Usually V SS = 0V, ground connection. 6 N/C No connection. 7 VDD Low voltage power supply. 8 LE (STROBE) When LE is high, the shift register output is latched to Q output. When LE stays high, the latches are in transparent mode. 9 Q5 High voltage output. 10 Q4 11 Q3 12 Q2 13 Q1 14 BLANKING When blanking is high, all Q’s are forced to a low state, regardless of data in each channel. 15 DATA IN Input data for the input shift register. 16 VBB High voltage power supply. 17 SERIAL DATA OUT Output data from the shift register. 18 N/C No connection. 19 Q10 High voltage output. 20 Q9 Pin Description |
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