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FMS6418 Datasheet(PDF) 9 Page - Fairchild Semiconductor |
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FMS6418 Datasheet(HTML) 9 Page - Fairchild Semiconductor |
9 / 10 page REV. 3G June 28, 2004 9 FMS6418A DATA SHEET E/2 2X ddd C B A 6 6 1.0 1.0 12 3 9 e /2 E1 E e N 8 – B – 7 2X N/2 TIPS 1.0 DIA – A – 7 – C – aaa C ccc 8 3 D CB A bbb M b NX A1 A2 A c1 c (b) b1 5 SECTION AA 10 A A – H – GAGE PLANE 0.25 (0.20) (02) R1 R 01 (L1) L (03) NOTES: 1 All dimensions are in millimeters (angle in degrees). 2 Dimensioning and tolerancing per ASME Y14.5–1994. 3 Dimensions "D" does not include mold flash, protusions or gate burrs. Mold flash protusions or gate burrs shall not exceed 0.15 per side . 4 Dimension "E1" does not include interlead flash or protusion. Interlead flash or protusion shall not exceed 0.25 per side. 5 Dimension "b" does not include dambar protusion. Allowable dambar protusion shall be 0.08mm total in excess of the "b" dimension at maximum material condition. Dambar connot be located on the lower radius of the foot. Minimum space between protusion and adjacent lead is 0.07mm for 0.5mm pitch packages. 6 Terminal numbers are shown for reference only. 7 Datums – A – and – B – to be determined at datum plane – H – . 8 Dimensions "D" and "E1" to be determined at datum plane – H – . 9 This dimensions applies only to variations with an even number of leads per side. For variation with an odd number of leads per side, the "center" lead must be coincident with the package centerline, Datum A. 10 Cross sections A – A to be determined at 0.10 to 0.25mm from the leadtip. SYMBOL MIN NOM MAX A – – 1.10 A1 0.05 – 0.15 A2 0.85 0.90 0.95 L 0.50 0.60 0.75 R 0.09 – – R1 0.09 – – b 0.19 – 0.30 b1 0.19 0.22 0.25 c 0.09 – 0.20 c1 0.09 – 0.16 01 0° – 8° L1 1.0 REF aaa 0.10 bbb 0.10 ccc 0.05 ddd 0.20 e 0.65 BSC 02 12° REF 03 12° REF TSSOP-14 D 4.90 5.00 5.10 E1 4.30 4.40 4.50 E 6.4 BSC e 0.65 BSC N 14 Package Dimensions TSSOP-14 SOIC-16 |
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