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DS34LV86TM Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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DS34LV86TM Datasheet(HTML) 1 Page - National Semiconductor (TI) |
1 / 10 page DS34LV86T 3V Enhanced CMOS Quad Differential Line Receiver General Description The DS34LV86T is a high speed quad differential CMOS re- ceiver that meets the requirements of both TIA/EIA-422-B and ITU-T V.11. The CMOS DS34LV86T features typical low static I CC of 9 mA which makes it ideal for battery powered and power conscious applications. The TRI-STATE® en- ables, EN, allow the device to be disabled when not in use to minimize power consumption. The dual enable scheme al- lows for flexibility in turning receivers on and off. The receiver output (RO) is guaranteed to be High when the inputs are left open. The receiver can detect signals as low as ±200 mV over the common mode range of ±10V. The re- ceiver outputs (RO) are compatible with TTL and LVCMOS levels. Features n Low power CMOS design (30 mW typical) n Interoperable with existing 5V RS-422 networks n Industrial temperature range n Meets TIA/EIA-422-B (RS-422) and ITU-T V.11 recommendation n 3.3V Operation n ±7V common mode range VID =3V n ±10V common mode range VID = 0.2V n Receiver OPEN input failsafe feature n Guaranteed AC parameter: Maximum Receiver Skew: 4 ns Transition time: 10 ns n Pin compatible with DS34C86T n 32 MHz Toggle Frequency n 6.5k ESD Tolerance (HBM) n Available in SOIC packaging Connection Diagram Truth Table Enable Inputs Output EN RI+–RI− RO LX Z HV ID ≥ +0.2V H HV ID ≤ −0.2V L H Open† H L = Logic Low H = Logic High X = Irrelevant Z = TRI-STATE † = Open, Not Terminated TRI-STATE® is a registered trademark of National Semiconductor Corporation. Dual-In-Line Package DS012644-1 Top View Order Number DS34LV86TN, DS34LV86TM See NS Package Number M16A or N16E February 1997 © 1998 National Semiconductor Corporation DS012644 www.national.com |
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