WM8761

Production Data

w

PD Rev 4.0 May 2004

11

LEFT CHANNEL

RIGHT CHANNEL

LRCIN

BCKIN

DIN

1/fs

n

3

2

1

n-2 n-1

LSB

MSB

n

3

2

1

n-2 n-1

LSB

MSB

1 BCKIN

1 BCKIN

Figure 3 I

RIGHT JUSTIFIED MODE

The WM8761 supports word lengths of 24-bits in right justified mode.

In right justified mode, the digital audio interface receives data on the DIN input. Audio Data is

time multiplexed with LRCIN indicating whether the left or right channel is present. LRCIN is also

used as a timing reference to indicate the beginning or end of the data words.

In right justified mode, the minimum number of BCKINs per LRCIN period is 2 times the selected

word length. LRCIN must be high for a minimum of word length BCKINs and low for a minimum of

word length BCKINs. Any mark to space ratio on LRCIN is acceptable provided the above

requirements are met.

In right justified mode, the LSB is sampled on the rising edge of BCKIN preceding a LRCIN

transition. LRCIN is high during the left samples and low during the right samples.

LEFT CHANNEL

RIGHT CHANNEL

LRCIN

BCKIN

DIN

1/fs

24

3

2

1

22

23

LSB

MSB

24

3

2

1

22

23

LSB

MSB

Figure 4 Right Justified Mode Timing Diagram

DSP MODE

A DSP compatible, time division multiplexed format is also supported by the WM8761. This

format is of the type where a ‘synch’ pulse is followed by two data words (left and right) of

predetermined word length. (16-bits). The ‘synch’ pulse replaces the normal duration LRCIN, and

DSP mode is auto-detected by the shorter than normal duration of the LRCIN. If LRCIN is of 4

BCKIN or less duration, the DSP compatible format is selected. Early and Late clock formats are

supported, selected by the state of the FORMAT pin.