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TFP403PZPG4 Datasheet(PDF) 7 Page - Texas Instruments |
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TFP403PZPG4 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 20 page TFP403 TI PanelBus™ DIGITAL RECEIVER SLDS125B − DECEMBER 2000 − REVISED MAY 2011 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) dc digital I/O specifications PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIH High level digital input voltage† 2 DVDD V VIL Low level digital input voltage† 0 0.8 V I High level output drive current‡ ST = High, VOH = 2.4 V 5 10 18 mA IOH High level output drive current‡ ST = Low, VOH = 2.4 V 3 6 12 mA I Low level output drive current‡ ST = High, VOL = 0.8 V 10 13 19 mA IOL Low level output drive current‡ ST = Low, VOL = 0.8 V 5 7 11 mA IOZ Hi-Z output leakage current PD = Low or PDO = Low −1 1 μA † Digital inputs are labeled DI in I/O column of Terminal Functions Table. ‡ Digital outputs are labeled DO in I/O column of Terminal Functions Table. dc specifications PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VID Analog input differential voltage (see Note 3) 75 1200 mv VIC Analog input common mode voltage (see Note 3) AVDD-300 AVDD-37 mv VI(OC) Open circuit analog input voltage AVDD-10 AVDD+10 mv IDD(2PIX) Normal 2-pix/clock power supply current (see Note 4) PIXEL RATE = 82.5 MHz 2-pix/clock 400 mA I(PD) Power down current (see Note 5) PD = Low 10 mA I(PDO) Output drive power down current (see Note 5) PDO = Low 45 mA NOTES: 3. Specified as dc characteristic with no overshoot or undershoot. 4. Alternating 2-pixel black/2-pixel white pattern. ST = high, STAG = high, QE[23:0] and QO[23:0] CL = 10 pF. 5. Analog inputs are open circuit (transmitter is disconnected from TFP403). |
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