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TFP401 Datasheet(PDF) 3 Page - Texas Instruments |
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TFP401 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 32 page 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 QO1 QO0 HSYNC DE ODCK OVDD CTL3 CTL2 CTL1 GND DVDD QE23 QE22 QE20 QE19 QE17 QE16 OVDD OGND QE15 QE14 OGND OVDD AGND Rx2+ Rx2− AVDD AGND AVDD Rx1− AGND AGND Rx0+ Rx0− AGND RxC+ RxC− AVDD EXT_RES PGND RSVD OCK_INV QO23 AVDD OGND QE18 QE21 VSYNC Rx1+ PVDD 3 TFP401, TFP401A www.ti.com SLDS120G – MARCH 2000 – REVISED MAY 2016 Product Folder Links: TFP401 TFP401A Submit Documentation Feedback Copyright © 2000–2016, Texas Instruments Incorporated 5 Description (Continued) PowerPAD advanced packaging technology results in best-of-class power dissipation, footprint, and ultralow ground inductance. The TFP401 and TFP401A combines PanelBus circuit innovation with TI's advanced 0.18-µm EPIC-5 CMOS process technology, along with TI PowerPAD package technology to achieve a reliable, low-powered, low-noise, high-speed digital interface solution. 6 Pin Configuration and Functions PZP Package 100-Pin HTQFP Top View Pin Functions PIN I/O DESCRIPTION NAME NO. AGND 79, 83, 87, 89, 92 GND Analog ground – Ground reference and current return for analog circuitry AVDD 82, 84, 88, 95 VDD Analog VDD – Power supply for analog circuitry. Nominally 3.3 V CTL[3:1] 42, 41, 40 DO General-purpose control signals – Used for user-defined control. CTL1 is not powered down via PDO. DE 46 DO Output data enable – Used to indicate time of active video display versus non-active display or blank time. During blank, only HSYNC, VSYNC, and CTL[3:1] are transmitted. During times of active display, or non-blank, only pixel data, QE[23:0], and QO[23:0] are transmitted. High: Active display time Low: Blank time |
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