High-Speed, Digitally Adjusted

Step-Down Controllers for Notebook CPUs

8

_______________________________________________________________________________________

50

µs/div

OUTPUT OVERLOAD WAVEFORM

C = INDUCTOR CURRENT, 5A/div

A

B

C

5

µs/div

LOAD-TRANSIENT RESPONSE

L = 0.7

B = INDUCTOR CURRENT, 5A/div

C = DL, 5V/div

A

B

C

5

µs/div

SHUTDOWN WAVEFORM

B = INDUCTOR CURRENT, 5A/div

C = SHDN, 2V/div

D = DL, 5V/div

A

B

C

D

_____________________________Typical Operating Characteristics (continued)

Pin Description

NAME

FUNCTION

5

CC

Integrator Capacitor Connection. Connect a 100pF to 1000pF (470pF typical) capacitor to GND to set the

integration time constant.

PIN

4

FBS

Tie FBS to FB (or disable the integrators) when externally adjusting the output voltage with a resistor-divider.

3

FB

ly at the power supply. An external resistor-divider can optionally set the output voltage.

8

TON

On-Time Selection Control Input. This is a four-level input that sets the K factor to determine DH on-time.

7

capacitor.

6

ILIM

Current-Limit Threshold Adjustment. Connects to an external resistor to GND. The LX-PGND current-limit

1

V+

Battery Voltage Sense Connection. V+ is used only for PWM one-shot timing. DH on-time is inversely propor-

tional to V+ input voltage over a range of 2V to 28V.

9

REF

2.0V Reference Output. Bypass REF to GND with a 0.22µF minimum capacitor. REF can source 50µA for

external loads. Loading REF degrades FB accuracy according to the REF load-regulation error

(see Electrical Characteristics).

2

SHDN

Shutdown Control Input, active low. SHDN cannot withstand the battery voltage. In shutdown mode, DL is