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L4979MD Datasheet(PDF) 5 Page - STMicroelectronics |
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L4979MD Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 10 page 5/10 L4979MD L4979D Note: 1. see fig4 (behavior of output current versus regulated voltage Vo) 2. guaranteed by design 3. When Vo becomes lower than 4V, the reset reaction time decreases down to 2 µs assuring a faster reset condition in this particular case. 2 VOLTAGE REGULATOR The voltage regulator uses a p-channel MOS transistor as a regulating element. With this structure a low drop- out voltage at current up to 150mA is achieved. The output voltage is regulated up to transient input supply volt- age of 40V. No functional interruption due to over-voltage pulses is generated. The high precision of the output voltage is obtained with a pre-trimmed reference voltage. A short circuit protection to GND is provided. Figure 4. Behavior of output current versus regulated voltage Vo (see a.m. Note 1) 3 RESET The reset circuit monitors the output voltage Vo. If the output voltage drops below Vo_th then Res becomes low with a delay time trr. Real trr value changes as a non-linear function of delta (Vo-th - Vo). The reset low signal is guaranteed for an output voltage Vo greater than 1V. When the output voltage becomes higher than Vo_th then Res goes high with a delay trd. This delay is obtained by 512 periods of an oscillator (see fig. 5). The oscillator period is given by: Vcw Icwc Charge current Vs = 13.5V, Vcw = 0.1V 4 7.5 14 µA Vcw Icwd Discharge current Vs = 13.5V, Vcw = 2.5V 1.0 2.4 4.5 µA Vcw Twop Watchdog period Vs = 13.5V, Ctw = 47nF 25 50 90 ms Res twol Watchdog output low time Vs = 13.5V, Ctw = 47nF 6 10 22 ms ENABLE En Ven_l Enable input low voltage 1 V En Ven_h Enable input high voltage 3 V En Ven_hy Enable input hysteresis 700 1000 1100 mV En I_leak Pull down current En = 5V 2 10 20 µA Pin Symbol Parameter Test Condition Min. Typ. Max. Unit Vo Vo_ref Iout Ishort Ilim Vo Vo_ref Iout Ishort Ilim ELECTRICAL CHARACTERISTICS (continued) |
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