10

LMK00306

SNAS578D – FEBRUARY 2012 – REVISED MARCH 2016

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Electrical Characteristics (continued)

Unless otherwise specified: Vcc = 3.3 V ± 5%, Vcco = 3.3 V ± 5%, 2.5 V ± 5%, -40 °C

differentially, input slew rate

= 25 °C, and at the Recommended Operation Conditions at the time of product characterization and are not ensured.

(1)(2)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output Rise Time

to 10 in. with 50-

Ω characteristic impedance,

175

300

ps

Output Fall Time

175

300

ps

LVDS OUTPUTS (CLKoutAn/CLKoutAn*, CLKoutBn/CLKoutBn*)

Maximum Output

Frequency

(5) (10)

1.0

1.6

GHz

Maximum Output

Frequency

1.5

2.1

GHz

Additive RMS Jitter,

Integration Bandwidth

10 kHz to 20

CLKin: 100 MHz,

Slew rate

≥ 3 V/ns

94

115

fs

CLKin: 156.25 MHz,

Slew rate

≥ 3 V/ns

70

90

Additive RMS Jitter

Integration Bandwidth

Vcco = 3.3 V,

CLKin: 100 MHz,

Slew rate

≥ 3 V/ns

89

fs

CLKin: 156.25 MHz,

Slew rate

≥ 2.7 V/ns

77

CLKin: 625 MHz,

Slew rate

≥ 3 V/ns

37

Noise Floor

Noise Floor

(14) (15)

Vcco = 3.3 V,

CLKin: 100 MHz,

Slew rate

≥ 3 V/ns

-159.5

dBc/Hz

CLKin: 156.25 MHz,

Slew rate

≥ 2.7 V/ns

-157.0

CLKin: 625 MHz,

Slew rate

≥ 3 V/ns

-152.7

DUTY

50% input clock duty cycle

45%

55%

250

400

450

mV

Change in Magnitude of

Output States

-50

50

mV

Output Offset Voltage

1.125

1.25

1.375

V

Change in Magnitude of

Output States

-35

35

mV

Output Short Circuit

Current Single Ended

Single ended outputs shorted to GND

-24

24

mA

Output Short Circuit

Current Differential

Complementary outputs tied together

-12

12

mA

Output Rise Time

Uniform transmission line up to 10 inches with 50-

175

300

ps

Output Fall Time

175

300

ps