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LMK00306 Datasheet(PDF) 2 Page - Texas Instruments |
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LMK00306 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 39 page 2 LMK00306 SNAS578D – FEBRUARY 2012 – REVISED MARCH 2016 www.ti.com Product Folder Links: LMK00306 Submit Documentation Feedback Copyright © 2012–2016, Texas Instruments Incorporated Table of Contents 1 Features .................................................................. 1 2 Applications ........................................................... 1 3 Description ............................................................. 1 4 Revision History..................................................... 2 5 Pin Configuration and Functions ......................... 4 6 Specifications......................................................... 6 6.1 Absolute Maximum Ratings ...................................... 6 6.2 ESD Ratings.............................................................. 6 6.3 Recommended Operating Conditions ....................... 6 6.4 Thermal Information .................................................. 6 6.5 Electrical Characteristics........................................... 7 6.6 Typical Characteristics ............................................ 14 7 Parameter Measurement Information ................ 18 7.1 Differential Voltage Measurement Terminology...... 18 8 Detailed Description ............................................ 19 8.1 Overview ................................................................. 19 8.2 Functional Block Diagram ....................................... 19 8.3 Feature Description................................................. 20 9 Application and Implementation ........................ 22 9.1 Driving the Clock Inputs .......................................... 22 9.2 Crystal Interface ...................................................... 23 9.3 Termination and Use of Clock Drivers .................... 24 10 Power Supply Recommendations ..................... 29 10.1 Power Supply Sequencing .................................... 29 10.2 Current Consumption and Power Dissipation Calculations.............................................................. 29 10.3 Power Supply Bypassing ...................................... 30 10.4 Thermal Management ........................................... 31 11 Device and Documentation Support ................. 33 11.1 Documentation Support ........................................ 33 11.2 Community Resources.......................................... 33 11.3 Trademarks ........................................................... 33 11.4 Electrostatic Discharge Caution ............................ 33 11.5 Glossary ................................................................ 33 12 Mechanical, Packaging, and Orderable Information ........................................................... 33 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (May 2013) to Revision D Page • Added "Ultra-Low Additive Jitter" to document title ................................................................................................................ 1 • Added, updated, or renamed the following sections: Specifications; Detailed Description; Application and Implementation; Power Supply Recommendations; Device and Documentation Support; Mechanical, Packaging, and Ordering Information........................................................................................................................................................ 1 • Changed Cin (typ) from 1 pF to 4 pF (based on updated test method) in Electrical Characteristics: Crystal Interface ....... 8 • Added footnote for VI_SE parameter in the Electrical Characteristics table. .......................................................................... 8 • Added “Additive RMS Jitter, Integration Bandwidth 10 kHz to 20 MHz” parameter with 100 MHz and 156.25 MHz Test conditions, Typical values, Max values, and footnotes in Electrical Characteristics: LVPECL Outputs ........................ 9 • Added “Additive RMS Jitter, Integration Bandwidth 10 kHz to 20 MHz” parameter with 100 MHz and 156.25 MHz Test conditions, Typical values, Max values, and footnotes in Electrical Characteristics: LVDS Outputs .......................... 10 • Added new paragraph at end of Driving the Clock Inputs ................................................................................................... 22 • Changed "LMK00301" to LMK00306" in Figure 27 and Figure 28 ...................................................................................... 23 • Changed Cin = 4 pF (typ, based on updated test method) in Crystal Interface................................................................... 23 • Added Power Supply Sequencing ....................................................................................................................................... 29 Changes from Revision B (February 2013) to Revision C Page • Changed Target Applications by adding additional applications to the second and third bullets, and removing High- Speed and Serial Interfaces from first bullet. ......................................................................................................................... 1 • Changed VCMtext to condition for VIH to VCM parameter group. .......................................................................................... 8 • Deleted VIH min value from Electrical Characteristics table. .................................................................................................. 8 • Deleted VIL max value from Electrical Characteristics table................................................................................................... 8 • Added VI_SE parameter and spec limits with corresponding table note to Electrical Characteristics Table. .......................... 8 • Changed third paragraph in Driving the Clock Inputs section to include CLKin* and LVCMOS text. Revised to better correspond with information in Electrical Characteristics Table. .......................................................................................... 22 • Changed bypass cap text to signal attenuation text of the fourth paragraph in Driving the Clock Inputs section. .............. 22 |
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