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SN75LVDM977DGG Datasheet(PDF) 1 Page - Texas Instruments

Part # SN75LVDM977DGG
Description  9-CHANNEL DUAL-MODE TRANSCEIVERS
Download  30 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SN75LVDM977DGG Datasheet(HTML) 1 Page - Texas Instruments

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FEATURES
DESCRIPTION
DGG PACKAGE
(TOP VIEW)
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INV/NON
GND
GND
1A
1DE/RE
2A
2DE/RE
3A
3DE/RE
4A
4DE/RE
VCC
GND
GND
GND
GND
GND
VCC
5A
5DE/RE
6A
6DE/RE
7A
7DE/RE
8A
8DE/RE
9A
9DE/RE
CDE2
CDE1
CDE0
9B+
9B
8B+
8B
7B+
7B
6B+
6B
VCC
GND
GND
GND
GND
GND
VCC
5B+
5B
4B+
4B
3B+
3B
2B+
2B
1B+
1B
SN75LVDM976
SN75LVDM977
SLLS292B – APRIL 1998 – REVISED JANUARY 2000
9-CHANNEL DUAL-MODE TRANSCEIVERS
9 Channels for the Data and Control Paths of
the Small Computer Systems Interface (SCSI)
Supports Single-Ended and Low-Voltage
Differential (LVD) SCSI
CMOS Input Levels ('LVDM976) or TTL Input
Levels ('LVDM977) Available
Includes DIFFSENS Comparators on CDE0
Single-Ended Receivers Include Noise Pulse
Rejection Circuitry
Packaged in Thin Shrink Small-Outline
Package With 20-Mil Terminal Pitch
Low Disabled Supply Current 7 mA Maximum
Power-Up/Down Glitch Protection
Bus is High-Impedance With VCC = 1.5 V
Pin-Compatible With the SN75976ADGG
High-Voltage Differential Transceiver
The SN75LVDM976 and SN75LVDM977 have nine
transceivers for transmitting or receiving the signals
to or from a SCSI data bus. They offer electrical
compatibility to both the single-ended signaling of
X3.277:1996-SCSI-3 Parallel Interface (Fast-20) and
the new low-voltage differential signaling method of
proposed standard 1142-D SCSI Parallel Interface –
2 (SPI-2).
The differential drivers are nonsymmetrical. The SCSI
bus uses a dc bias on the line to allow terminated fail
safe and wired-OR signaling. This bias can be as
high as 125 mV and induces a difference in the
high-to-low and low-to-high transition times of a
AVAILABLE OPTIONS
symmetrical driver. In order to reduce pulse skew, an
PACKAGE
LVD SCSI driver's output characteristics become
TSSOP (DGG)
nonsymmetrical. In other words, there is more
TA
TSSOP (DGG)
TTL INPUTS
assertion current than negation current to or from the
CMOS INPUT LEVELS
LEVELS
driver. This allows the actual differential signal
0°C to
SN75LVDM976DGG
SN75LVDM977DGG
voltage on the bus to be symmetrical about 0 V. Even
70°C
SN75LVDM976DGGR(1)
SN75LVDM977DGGR(1)
though
the
driver
output
characteristics
are
nonsymmetrical, the design of the 'LVDM976 drivers
maintains balanced signaling. Balanced means that
the current that flows in each signal line is nearly
equal but opposite in direction and is one of the keys
to the low-noise performance of a differential bus.
(1)
The R suffix designates a taped and reeled package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2000, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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