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SN75DP159RSBT Datasheet(PDF) 6 Page - Texas Instruments |
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SN75DP159RSBT Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 63 page  6 SN65DP159, SN75DP159 SLLSEJ2C – JULY 2015 – REVISED JULY 2016 www.ti.com Product Folder Links: SN65DP159 SN75DP159 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Pin Functions (continued) PIN I/O DESCRIPTION (1) SIGNAL NAME RGZ RSB HOT PLUG DETECT PINS HPD_SRC 4 3 O Hot plug detect output HPD_SNK 33 28 I (Failsafe) Hot plug detect input AUXILIARY/DDC DATA PINS AUX_SRCp AUX_SRCn 45 44 N/A I/O Source side bidirectional DisplayPort auxiliary for I2C-over-AUX (DP159RGZ only) SDA_SRC SCL_SRC 47 46 39 38 I/O (Failsafe) Source side TMDS port bidirectional DDC data line SDA_SNK SCL_SNK 39 38 33 32 I/O (Failsafe) Sink side TMDS port bidirectional DDC data lines CONTROL PINS OE 42 36 I Operation enable/reset pin OE = L: Power-down mode OE = H: Normal operation Internal weak pullup: Resets device when transitions from H to L NC (2) 17 N/A I No connect CEC_EN (2) 18 N/A O CEC control pin for Dongle applications SLEW_CTL 40 34 I 3 level (1) Slew rate control when I2C_EN/PIN = Low. SLEW_CTL = H, fastest data rate SLEW_CTL = L, 5 ps slow SLEW_CTL = No Connect, 10 ps slow When I2C_EN/PIN = High Slew rate is controlled through I2C[4] PRE_SEL 20 16 I 3 level (1) De-emphasis pin strap when I2C_EN/PIN = Low. PRE_SEL = L: - 2 dB de-emphasis PRE_SEL = No Connect: 0 dB PRE_SEL = H: Reserved EQ_SEL/A0 21 17 I 3 level (1) Input Receive Equalization pin strap when I2C_EN/PIN = Low EQ_SEL = L: Fixed EQ at 7.5 dB EQ_SEL = No Connect: Adaptive EQ EQ_SEL = H: Fixed at 14 dB When I2C_EN/PIN = High Address bit 1 Note: (3 level for pin strap programming but 2 level when I2C[4] address) I2C_EN/PIN 10 8 I I2C_EN/PIN = High; puts device into I2C control mode I2C_EN/PIN = Low; puts device into pin strap mode SCL_CTL 15 13 I I2C clock signal Note: When I2C_EN/PIN = Low Pin strapping take priority and those functions cannot be changed by I2C SDA_CTL 16 14 I/O I2C data signal Note: When I2C_EN/PIN = Low Pin strapping take priority and those functions cannot be changed by I2C Vsadj 22 18 I TMDS-compliant voltage swing control nominal resistor to GND HDMI_SEL/A1 27 23 I HDMI_SEL when I2C_EN/PIN = Low HDMI_SEL = High: Device configured for DVI HDMI_SEL = Low: Device configured for HDMI (Adaptor ID block is readable through I2C[4] or I2C-over-AUX. When I2C_EN/PIN = High Address bit 2 Note: Weak internal pull down TX_TERM_CTL (2) 36 N/A I 3 level (1) Transmit Termination Control when I2C_EN/PIN = Low TX_TERM_CTL = H, No transmit termination TX_TERM_CTL = L, Transmit termination impedance in 75 to about 150 Ω TX_TERM_CTL = No Connect, automatically selects the termination impedance Data rate (DR) > 3.4 Gbps – 75- to 150-Ω differential near end termination 2 Gbps < DR < 3.4 Gbps – 150- to 300-Ω differential near end termination DR < 2 Gbps – no termination Note: If left floating will be in automatic select mode. |
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