LMH0036

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SNLS254B – MARCH 2008 – REVISED APRIL 2013

Control Inputs and Indicator Outputs

SERIAL DATA INPUT SELECTOR

The Serial Data Input Selector (SEL [1:0]) allows the user to select the active input channel. Table 1 shows the

input selected for a given state of SEL [1:0].

Table 1. Data Input Select Codes

SEL [1:0] Code

Selected Input

00

SDI0

01

SDI1

10

SDI2

11

SDI3

LOCK DETECT

The Lock Detect (LD) output, when high, indicates that data is being received and the PLL is locked. LD may be

connected to the OUTPUT MUTE input to mute the data and clock outputs when no data signal is being

received. Note that when the Bypass/Auto Bypass input is set high, Lock Detect will remain low. See Table 2.

OUTPUT MUTE

The OUTPUT MUTE input, when low, mutes the serial data and clock outputs. It may be connected to Lock

Detect or externally driven to mute or un-mute the outputs. If OUTPUT MUTE is connected to LD, then the data

and clock outputs are muted when the PLL is not locked. This function overrides the Bypass function: see

Table 2. OUTPUT MUTE has an internal pull-up device to enable the output by default.

BYPASS/AUTO BYPASS

The Bypass/Auto Bypass input, when high, forces the device to output the data without reclocking it. When this

input is low, the device automatically bypasses the reclocking function when the device is in an unlocked

condition or the detected data rate is a rate which the device does not support. Note that when the Bypass/Auto

Bypass input is set high, Lock Detect will remain low. See Table 2. BYPASS/AUTO BYPASS has an internal pull-

down device.

Table 2. Control Functionality

LOCK DETECT

OUTPUT MUTE

BYPASS/AUTO BYPASS

DEVICE STATUS

0

1

X

PLL unlocked, reclocker bypassed

1

1

0

PLL locked to supported data rate, reclocker not bypassed

X

0

X

Outputs muted

0

LOCK DETECT

X

Outputs muted

1

LOCK DETECT

0

PLL locked to supported data rate, reclocker not bypassed

SD

The SD output indicates that the LMH0036 is locked and processing SD data rates. It may be used to control

another device such as the LMH0002 cable driver. When this output is high it indicates that the data rate is 270

Mbps. The SD output is a registered function and is only valid when the PLL is locked and the Lock Detect

output is high. The SD output is undefined for a short time after lock detect assertion or de-assertion due to a

data change on the SDI input. See Figure 4 for a timing diagram showing the relationship between SDI, Lock

Detect, and SD.

Copyright © 2008–2013, Texas Instruments Incorporated

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