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LME49830 Datasheet(PDF) 3 Page - Texas Instruments |
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LME49830 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 23 page  Mute GND IN- IN+ Reference and Protection + - Osense + - Mute Control 1 k: Comp -VEE BiasM NOUT +VCC POUT BiasP Gm Amp Mute Amp LME49830 www.ti.com SNAS396D – JANUARY 2008 – REVISED APRIL 2013 PIN DESCRIPTIONS Pin Pin Name Description 1 NC No Connection, Pin electrically isolated 2 Mute Mute Control 3 GND Device Ground 4 IN+ Non-inverting input 5 IN- Inverting input 6 Comp External Compensation Connection 7 NC No Connection, Pin electrically isolated 8 Osense Output Sense 9 NC No Connection, Pin electrically isolated 10 -VEE Negative Power Supply 11 BiasM Negative External Bias Control 12 BiasP Positive External Bias Control 13 POUT P-channel MOSFET Output 14 NOUT N-channel MOSFET Output 15 +VCC Positive Power Supply BLOCK DIAGRAM Figure 3. LME49830 Simplified Block Diagram Copyright © 2008–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LME49830 |
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