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DS90UB964-Q1 Datasheet(PDF) 7 Page - Texas Instruments |
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DS90UB964-Q1 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 116 page  7 DS90UB964-Q1 www.ti.com SNLS500 – JULY 2016 Product Folder Links: DS90UB964-Q1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Recommended Operating Conditions (continued) Over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT (1) Supply noise testing was performed with minimum capacitors (as shown Figure 38 on the PCB). A sinusoidal signal is AC coupled from DC to 10 MHz to the VDD11, VDD18, and VDDIO (1.8V / 3.3V) supply pins with amplitude of 25 mVp-p, 50 mVp-p, and 50 mVp-p / 100 mVp-p respectively measured at the device VDD pins. Supply Noise(1) VDD11 25 mVP-P VDD18 50 mVP-P VDDIO 1.8V Option 50 mVP-P 3.3V Option 100 mVP-P (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.5 Thermal Information THERMAL METRIC(1) DS90UB964-Q1 UNIT RGC (VQFN) 64 PINS RθJA Junction-to-ambient thermal resistance 25.5 °C/W RθJC(top) Junction-to-case (top) thermal resistance 10.8 °C/W RθJB Junction-to-board thermal resistance 4.8 °C/W ψJT Junction-to-top characterization parameter 0.2 °C/W ψJB Junction-to-board characterization parameter 4.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 0.7 °C/W (1) GPIO[7:0] Register 0xBE = 0xFF 6.6 DC Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. PARAMETER TEST CONDITIONS PIN OR FREQUENCY MIN TYP MAX UNIT 1.8 V LVCMOS I/O (VDDIO = 1.8 V ± 5%) VIH High Level Input Voltage GPIO[7:0], PDB, REFCLK 0.65 × VDDIO VDDIO V VIL Low Level Input Voltage GND 0.35 × VDDIO V IIN Input Current VIN = 0 V or VDDIO GPIO[7:0](1), PDB –20 20 μA VOH High Level Output Voltage IOH = –2 mA GPIO[7:0] VDDIO – 0.45 VDDIO V VOL Low Level Output Voltage IOL = 2 mA GPIO[7:0], INTB GND 0.45 V IOS Output Short Circuit Current VOUT = 0 V GPIO[7:0] –35 mA IOZ TRI-STATE Output Current VOUT = 0 V or VDDIO, PDB = LOW GPIO[7:0] –20 20 μA 3.3 V LVCMOS I/O (VDDIO = 3.3 V ± 10%) VIH High Level Input Voltage GPIO[7:0], REFCLK 2 VDDIO V VIL Low Level Input Voltage GND 0.8 V IIN Input Current VIN = 0 V or VDDIO GPIO[7:0](1) –20 20 μA VOH High Level Output Voltage IOH = –4 mA GPIO[7:0] 2.4 VDDIO V VOL Low Level Output Voltage IOL = 4 mA GPIO[7:0], INTB GND 0.4 V |
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