2B

3

2

5

8

1

1A

1B

GND

DCT PACKAGE

(TOP VIEW)

YZP PACKAGE

(BOTTOM VIEW)

DCU PACKAGE

(TOP VIEW)

3

2

4

5

1

1A

1Y

1B

GND

1B

GND

2A

2Y

See mechanical drawings for dimensions.

2

5

3

4

8

2Y

2B

2A

2Y

1Y

2A

4

6

7

6

7

8

6

1

7

1A

2B

1Y

SN74LVC2G86

www.ti.com

SCES360I – AUGUST 2001 – REVISED DECEMBER 2013

Dual 2-Input Exclusive-OR Gate

Check for Samples: SN74LVC2G86

1

FEATURES

DESCRIPTION

This dual 2-input exclusive-OR gate is designed for

2

•

Available in the Texas Instruments NanoFree™

Package

The SN74LVC2G86 performs the Boolean function Y

•

= A

⊕ B or Y = AB + AB in positive logic.

•

Inputs Accept Voltages to 5.5 V

NanoFree™

package

technology

is

a

major

•

breakthrough in IC packaging concepts, using the die

•

Low Power Consumption, 10-

as the package.

•

±24-mA Output Drive at 3.3 V

A common application is as a true/complement

•

element. If the input is low, the other input is

reproduced in true form at the output. If the input is

•

high, the signal on the other input is reproduced

inverted at the output.

•

This device is fully specified for partial-power-down

Down Mode and Back Drive Protection

outputs,

preventing

damaging

current

backflow

•

Latch-Up Performance Exceeds 100 mA Per

through the device when it is powered down.

JESD 78, Class II

•

ESD Protection Exceeds JESD 22

–

2000-V Human-Body Model (A114-A)

–

200-V Machine Model (A115-A)

–

1000-V Charged-Device Model (C101)

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 2001–2013, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.