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HN58C65 Datasheet(PDF) 1 Page - Hitachi Semiconductor |
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HN58C65 Datasheet(HTML) 1 Page - Hitachi Semiconductor |
1 / 16 page HN58C65 Series 8192-word × 8-bit Electrically Erasable and Programmable CMOS ROM ADE-203-374A (Z) Rev. 1.0 Apr. 12, 1995 Description The Hitachi HN58C65 is a electrically erasable and programmable ROM organized as 8192-word × 8-bit. It realizes high speed, low power consumption, and a high level of reliability, employing advanced MNOS memory technology and CMOS process and circuitry technology. It also has a 32-byte page programming function to make its erase and write operations faster. Features • Single 5 V Supply • On chip latches: address, data, CE, OE, WE • Automatic byte write: 10 ms max • Automatic page write (32 byte): 10 ms max • Fast access time: 250 ns max • Low power dissipation: 20 mW/MHz typ (Active) 2.0 mW typ (Standby) • Data polling and Ready/Busy • Data protection circuity on power on/power off • Conforms to JEDEC byte-wide standard • Reliable CMOS with MNOS cell technology • 10 5 erase/write cycles (in page mode) • 10 year data retention Ordering Information Type No. Access Time Package HN58C65P-25 250 ns 600 mil 28 pin plastic DIP (DP-28) HN58C65FP-25 250 ns 28 pin plastic SOP *1 (FP-28D/DA) Note: 1. T is added to the end of the type no. for a SOP of 3.0 mm (max) thickness. |
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