XRA1202/1202P

3

REV. 1.0.1

8-BIT I2C/SMBUS GPIO EXPANDER WITH RESET

PIN DESCRIPTIONS

Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.

Pin Description

QFN-16

TSSOP-16

SDA

13

15

I/O

SCL

12

14

I

IRQ#

11

13

OD

Interrupt output (open-drain, active LOW).

A0

A1

15

16

1

2

I

I

Table 1.

RESET#

1

3

I

Reset (active LOW) - A longer than 40 ns LOW pulse on this pin will reset the

internal registers and all GPIOs will be configured as inputs.

GPIOs

P0

P1

P2

P3

P4

P5

P6

P7

2

3

4

5

7

8

9

10

4

5

6

7

9

10

11

12

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

General purpose I/Os P0-P7. All GPIOs are configured as inputs upon power-

up or after a reset. After power-up or reset, the internal pull-up resistors are

enabled for the XRA1202P. After power-up or reset, the internal pull-up resis-

tors are disabled for the XRA1202.

ANCILLARY SIGNALS

VCC

14

16

Pwr

1.65V to 3.6V VCC supply voltage.

GND

6

8

Pwr

Power supply common, ground.

GND

Center

Pad

-

Pwr

The exposed pad at the bottom surface of the package is designed for thermal

performance. Use of a center pad on the PCB is strongly recommended for ther-

mal conductivity as well as to provide mechanical stability of the package on the

PCB. The center pad is recommended to be solder masked defined with open-

ing size less than or equal to the exposed thermal pad on the package bottom to

prevent solder bridging to the outer leads of the device. Thermal vias must be

connected to GND plane as the thermal pad of package is at GND potential.