SN54ALS996 . . . JT PACKAGE

SN74ALS996 . . . DW OR NT PACKAGE

(TOP VIEW)

SN54ALS996 . . . FK PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

9

10

11

12

24

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18

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13

1D

2D

3D

4D

5D

6D

7D

8D

EN

RD

CLK

GND

1Q

2Q

3Q

4Q

5Q

6Q

7Q

8Q

OE

T/C

CLR

NC − No internal connection

32 1 28 27

12 13

5

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11

25

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3Q

4Q

5Q

NC

6Q

7Q

8Q

4D

5D

6D

NC

7D

8D

EN

426

14 15 16 17 18

SN54ALS996, SN74ALS996

8BIT DTYPE EDGETRIGGERED READBACK LATCHES

SDAS098B − OCTOBER 1984 − REVISED JANUARY 1995

Copyright

2−1

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Data at Q Outputs

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Standard Plastic

(NT) and Ceramic (JT) 300-mil DIPs

description

These 8-bit latches are designed specifically for

storing the contents of the input data bus and

providing the capability of reading back the stored

data onto the input data bus. The Q outputs are

designed with bus-driving capability.

The edge-triggered flip-flops enter the data on the

low-to-high transition of the clock (CLK) input

when the enable (EN) input is low. Data can be

read back onto the data inputs by taking the read

(RD) input low, in addition to having EN low. When

EN is high, both the read-back and write modes

are disabled. Transitions on EN should only be

made with CLK high to prevent false clocking.

The polarity of the Q outputs can be controlled by

the polarity (T/C) input. When T/C is high, Q is the

same as is stored in the flip-flops. When T/C is low,

the output data is inverted. The Q outputs can be

placed in the high-impedance state by taking the

output-enable (OE) input high. OE does not affect

the internal operation of the register. Old data can

be retained or new data can be entered while the

outputs are off.

A low level at the clear (CLR) input resets the

internal registers low. The clear function is

asynchronous and overrides all other register

functions.

The -1 version of the SN74ALS996 is identical to the standard version, except that the recommended maximum

The SN54ALS996 is characterized for operation over the full military temperature range of −55

°C to 125°C. The

SN74ALS996 is characterized for operation from 0

°C to 70°C.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.