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K5A3380YTC-T855 Datasheet(PDF) 2 Page - Samsung semiconductor |
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K5A3380YTC-T855 Datasheet(HTML) 2 Page - Samsung semiconductor |
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2 / 45 page  MCP MEMORY K5A3x80YT(B)C Revision 0.0 November 2002 - 2 - Preliminary Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 8M(1Mx8/512Kx16) Full CMOS SRAM The K5A3x80YT(B)C featuring single 3.0V power supply is a Multi Chip Package Memory which combines 32Mbit Dual Bank Flash and 8Mbit fCMOS SRAM. The 32Mbit Flash memory is organized as 4M x8 or 2M x16 bit and 8Mbit SRAM is organized as 1M x8 or 512K x16 bit. The memory architecture of flash memory is designed to divide its memory arrays into 71 blocks and this provides highly flexible erase and program capability. This device is capable of reading data from one bank while programming or erasing in the other bank with dual bank organization. The Flash memory performs a program operation in units of 8 bits (Byte) or 16 bits (Word) and erases in units of a block. Single or multiple blocks can be erased. The block erase operation is com- pleted for typically 0.7sec. The 8Mbit SRAM supports low data retention voltage for battery backup operation with low data retention current. The K5A3x80YT(B)C is suitable for the memory of mobile com- munication system to reduce mount area. This device is available in 69-ball TBGA Type package. FEATURES • Power Supply voltage : 2.7V to 3.3V • Organization - Flash : 4,194,304 x 8 / 2,097,152 x 16 bit - SRAM : 1,048,576 x 8 / 524,288 x 16 bit • Access Time (@2.7V) - Flash : 70 ns, SRAM : 55 ns • Power Consumption (typical value) - Flash Read Current : 14 mA (@5MHz) Program/Erase Current : 15 mA Standby mode/Autosleep mode : 5 µA Read while Program or Read while Erase : 25 mA - SRAM Operating Current : 22 mA Standby Current : 0.5 µA • Secode(Security Code) Block : Extra 64KB Block (Flash) • Block Group Protection / Unprotection (Flash) • Flash Bank Size : 8Mb / 24Mb , 16Mb / 16Mb • Flash Endurance : 100,000 Program/Erase Cycles Minimum • SRAM Data Retention : 1.5 V (min.) • Industrial Temperature : -40°C ~ 85°C • Package : 69-ball TBGA Type - 8 x 11mm, 0.8 mm pitch 1.2mm(max.) Thickness GENERAL DESCRIPTION SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. BALL CONFIGURATION BALL DESCRIPTION Ball Name Description A0 to A18 Address Input Balls (Common) A-1, A19 to A20 Address Input Balls (Flash Memory) DQ0 to DQ15 Data Input/Output Balls (Common) RESET Hardware Reset (Flash Memory) WP/ACC Write Protection / Acceleration Program (Flash Memory) VccS Power Supply (SRAM) VccF Power Supply (Flash Memory) Vss Ground (Common) UB Upper Byte Enable (SRAM) LB Lower Byte Enable (SRAM) BYTES BYTES Control (SRAM) BYTEF BYTEF Control (Flash Memory) SA Address Inputs (SRAM) CEF Chip Enable (Flash Memory) CS1S Chip Enable (SRAM Low Active) CS2S Chip Enable (SRAM High Active) WE Write Enable (Common) OE Output Enable (Common) RY/BY Ready/Busy (Flash memory) N.C No Connection Top View (Ball Down) A7 UB A8 A3 A6 RESET LB CS2S A19 A2 A5 A18 RY/BY A20 A9 A4 DQ6 CEF OE DQ9 DQ3 DQ4 DQ13 1 2 3 4 5 6 A B C D E F WP/ WE VSS A10 DQ1 A0 A1 A17 A11 A12 A15 A13 N.C A14 SA A16 DQ15 BYTE F 7 8 N.C DQ8 DQ2 DQ11 DQ5 H DQ14 CS1S DQ0 DQ10 VccF VccS DQ12 G DQ7 Vss BYTES /A-1 N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C 9 10 K J 69 Ball TBGA , 0.8mm Pitch ACC |
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