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PCA9534DWG4 Datasheet(PDF) 8 Page - Texas Instruments |
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PCA9534DWG4 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 40 page  PCA9534 SCPS124G – SEPTEMBER 2006 – REVISED JUNE 2014 www.ti.com 7.5 I 2C Interface Timing Requirements over operating free-air temperature range (unless otherwise noted) (see Figure 14) STANDARD MODE FAST MODE I2C BUS I2C BUS UNIT MIN MAX MIN MAX fscl I2C clock frequency 0 100 0 400 kHz tsch I2C clock high time 4 0.6 μs tscl I2C clock low time 4.7 1.3 μs tsp I2C spike time 50 50 ns tsds I2C serial-data setup time 250 100 ns tsdh I2C serial-data hold time 0 0 ns ticr I2C input rise time 1000 20 + 0.1Cb (1) 300 ns ticf I2C input fall time 300 20 + 0.1Cb (1) 300 ns tocf I2C output fall time 10-pF to 400-pF bus 300 20 + 0.1Cb (1) 300 ns tbuf I2C bus free time between stop and start 4.7 1.3 μs tsts I2C Start or repeated Start condition setup 4.7 0.6 μs tsth I2C Start or repeated Start condition hold 4 0.6 μs tsps I2C Stop condition setup 4 0.6 μs tvd(data) Valid data time SCL low to SDA output valid 300 50 ns ACK signal from SCL low to tvd(ack) Valid data time of ACK condition 0.3 3.45 0.1 0.9 μs SDA (out) low Cb I2C bus capacitive load 400 400 ns (1) Cb = total capacitive of one bus in pF 7.6 Switching Characteristics over operating free-air temperature range (unless otherwise noted) (see Figure 15 and Figure 16) STANDARD MODE FAST MODE FROM TO I2C BUS I2C BUS PARAMETER UNIT (INPUT) (OUTPUT) MIN MAX MIN MAX tiv Interrupt valid time P port INT 4 4 μs tir Interrupt reset delay time SCL INT 4 4 μs tpv Output data valid SCL P7–P0 200 200 ns tps Input data setup time P port SCL 100 100 ns tph Input data hold time P port SCL 1 1 μs 8 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated Product Folder Links: PCA9534 |
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