Part Name
         Description
CD54HC4040

 High-Speed CMOS Logic 12-Stage Binary Counter ( 15 Page)


TI
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5
HCT TYPES
High Level Input
Voltage
VIH
-
-
4.5 to 5.5
2
-
-
2
-
2
-
V
Low Level Input
Voltage
VIL
-
-
4.5 to 5.5
-
-
0.8
-
0.8
-
0.8
V
High Level Output
Voltage
CMOS Loads
VOH
VIH or VIL
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
High Level Output
Voltage
TTL Loads
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
Low Level Output
Voltage
CMOS Loads
VOL
VIH or VIL
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
4
4.5
-
-
0.26
-
0.33
-
0.4
V
Input Leakage
Current
II
VCC and
GND
0
5.5
-
-
±0.1
-
±1-
±1
µA
Quiescent Device
Current
ICC
VCC or
GND
0
5.5
-
-
8
-
80
-
160
µA
Additional Quies-
cent Device Current
Per Input Pin: 1 Unit
Load
∆ICC
(Note 2)
VCC
-2.1
-
4.5 to 5.5
-
100
360
-
450
-
490
µA
NOTE:
2. For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA.
DC Electrical Specifications (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC (V)
25oC
-40oC TO 85oC -55oC TO 125oC
UNITS
VI (V)
IO (mA)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HCT Input Loading Table
INPUT
UNIT LOADS
MR
0.65
CP
0.5
NOTE: Unit Load is
∆ICC limit specified in DC Electrical Table, e.g.,
360
µA max at 25oC.
Prerequisite for Switching Specifications
PARAMETER
SYMBOL
VCC (V)
25oC
-40oC TO 85oC
-55oC TO 125oC
UNITS
MIN
MAX
MIN
MAX
MIN
MAX
HC TYPES
Maximum Input Pulse
Frequency
fMAX
2
6
-
5
-
4
-
MHz
4.5
30
-
25
-
20
-
MHz
6
35
-
29
-
24
-
MHz
Input Pulse Width
tW
2
80
-
100
-
120
-
ns
4.5
16
-
20
-
24
-
ns
6
14
-
17
-
20
-
ns
CD54HC4040, CD74HC4040, CD54HCT4040, CD74HCT4040



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