SN54ALS465A THRU SN54ALS468A

SN74ALS465A THRU SN74ALS468A

OCTAL BUFFERS WITH 3STATE OUTPUTS

SDAS223 − D2661, APRIL 1982 − REVISED MAY 1986

POST OFFICE BOX 655303

POST OFFICE BOX 1443

3

EN

1

1G

2

1A1

4

1A2

6

1A3

8

1A4

3

1Y1

5

1Y2

7

1Y3

9

1Y4

2Y4

17

2Y3

15

2Y2

13

2Y1

11

2A4

18

2A3

16

2A2

14

2A1

12

2G

19

EN

’ALS468A

EN

1

1G

2

1A1

4

1A2

6

1A3

8

1A4

3

1Y1

5

1Y2

7

1Y3

9

1Y4

2Y4

17

2Y3

15

2Y2

13

2Y1

11

2A4

18

2A3

16

2A2

14

2A1

12

2G

19

EN

’ALS467A

logic diagrams (positive logic)

19

2G

2A1

12

2A2

14

2A3

16

2A4

18

11

2Y1

13

2Y2

15

2Y3

17

2Y4

1Y4

9

1Y3

7

1Y2

5

1Y1

3

8

1A4

6

1A3

4

1A2

2

1A1

1G

1

’ALS468A

19

2G

2A1

12

2A2

14

2A3

16

2A4

18

11

2Y1

13

2Y2

15

2Y3

17

2Y4

1Y4

9

1Y3

7

1Y2

5

1Y1

3

8

1A4

6

1A3

4

1A2

2

1A1

1G

1

’ALS467A

† These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for DW, J, and N packages.